Distributed amplifier

Patent metadata

Field	Value
Publication number	US-12567840-B2
Application number	US-202018002939-A
Country	US
Kind code	B2
Filing date	Jun 26, 2020
Priority date	Jun 26, 2020
Publication date	Mar 3, 2026
Grant date	Mar 3, 2026

Abstract

An embodiment is a distributed amplifier including amplifier blocks, each of the amplifier blocks including a first transmission line to receive input of a signal to an input end, a second transmission line to output a signal from an output end, a first termination resistor having a first end connected to a terminal end of the first transmission line, a second termination resistor having a first end connected to an input end of the second transmission line, and unit cells arranged along the first and second transmission lines, each of the unit cells having an input terminal connected to the first transmission line and an output terminal connected to the second transmission line, the amplifier blocks are connected in cascade such that a terminal end of the second transmission line of one of the amplifier blocks is connected to the first transmission line of a subsequent amplifier block.

First claim

The invention claimed is:

1 . A distributed amplifier comprising:
N amplifier blocks, where N is an integer of 2 or more, each of the amplifier blocks including:
a first transmission line having an input end that receives input of a signal,
a second transmission line having an output end that outputs a signal,
a first termination resistor having a first end connected to a terminal end of the first transmission line,
a second termination resistor having a first end connected to an input end of the second transmission line, and
a plurality of unit cells arranged along the first and second transmission lines, each of the unit cells having an input terminal connected to the first transmission line and an output terminal connected to the second transmission line, wherein:
the amplifier blocks are connected in cascade such that a terminal end of the second transmission line of one of the amplifier blocks is connected to the input end of the first transmission line of a subsequent amplifier block, a second end of the first termination resistor of each of the amplifier blocks is connected to a first bias voltage, a second end of the second termination resistor of each of the amplifier blocks except the amplifier block in a last stage is connected to a first power supply voltage, and a second end of the second termination resistor of the amplifier block in the last stage is connected to a ground, values of the characteristic impedances of all the transmission lines and all the first and second termination resistors are 50Ω, and the first power supply voltage of the amplifier block in an n-th stage is set to Vb_(n+1)+Iopt×Nopt×50, where n is an integer from 1 to N−1, Vb_(n+1) is the first bias voltage of the amplifier block in an (n+1)-th stage, Nopt is the number of the unit cells in each of the amplifier blocks, and Iopt is the current that flows between the input terminal and the output terminal in each of the unit cells.

2 . The distributed amplifier according to claim 1 , wherein each of the unit cells includes:
a first transistor having a base terminal connected to the first transmission line and an emitter terminal connected to a second power supply voltage, and a second transistor having a base terminal connected to a second bias voltage, a collector terminal connected to the second transmission line, and an emitter terminal connected to the collector terminal of the first transistor.

3 . A distributed amplifier comprising:
N amplifier blocks, where N is an integer of 2 or more, each of the amplifier blocks including:
a first transmission line having an input end that receives input of a signal,
a second transmission line having an output end that outputs a signal,
a first termination resistor having a first end connected to a terminal end of the first transmission line,
a second termination resistor having a first end connected to an input end of the second transmission line, and
a plurality of unit cells arranged along the first and second transmission lines, each of the unit cells having an input terminal connected to the first transmission line and an output terminal connected to the second transmission line, wherein:
the amplifier blocks are connected in cascade such that a terminal end of the second transmission line of one of the amplifier blocks is connected to the input end of the first transmission line of a subsequent amplifier block, a second end of the first termination resistor of each of the amplifier blocks is connected to a first bias voltage, and a second end of the second termination resistor of each of the amplifier blocks is connected to a ground, values of the first transmission line of the amplifier block in a first stage, the first termination resistor of the amplifier block in the first stage, the characteristic impedance of the second transmission line of the amplifier block in a last stage, and the second termination resistor of the amplifier block in the last stage are 50Ω, and the characteristic impedance of the second transmission line of the amplifier block in an n-th stage, the second termination resistor of the amplifier block in the n-th stage, the characteristic impedance of the first transmission line of the amplifier block in an (n+1)-th stage, and the first termination resistor of the amplifier block in the (n+1)-th stage are set to −Vb_(n+1)/(Iopt×Nopt), where n is an integer from 1 to N−1, Vb_(n+1) is the first bias voltage of the amplifier block in the (n+1)-th stage, Nopt is the number of the unit cells in each of the amplifier blocks, and Iopt is the current that flows between the input terminal and the output terminal in each of the unit cells.

4 . The distributed amplifier according to claim 3 , wherein each of the unit cells includes:
a first transistor having a base terminal connected to the first transmission line and an emitter terminal connected to a second power supply voltage, and a second transistor having a base terminal connected to a second bias voltage, a collector terminal connected to the second transmission line, and an emitter terminal connected to the collector terminal of the first transistor.

5 . A distributed amplifier comprising:
N amplifier blocks, where N is an integer of 2 or more, each of the amplifier blocks including:
a first transmission line having an input end that receives input of a signal,
a second transmission line having an output end that outputs a signal,
a first termination resistor having a first end connected to a terminal end of the first transmission line,
a second termination resistor having a first end connected to an input end of the second transmission line, and
a plurality of unit cells arranged along the first and second transmission lines, each of the unit cells having an input terminal connected to the first transmission line and an output terminal connected to the second transmission line, wherein:
the amplifier blocks are connected in cascade such that a terminal end of the second transmission line of one of the amplifier blocks is connected to the input end of the first transmission line of a subsequent amplifier block, a second end of the first termination resistor of each of the amplifier blocks is connected to a first bias voltage, and a second end of the second termination resistor of each of the amplifier blocks is connected to a ground, the values of the characteristic impedances of all the transmission lines and all the first and second termination resistors are 50Ω, and a transistor whose optimal current is −Vb_(n+1)/(Nopt_n×50) is used in each of the unit cells of the amplifier block in the n-th stage, where n is an integer from 1 to N−1, Vb_(n+1) is the first bias voltage of the amplifier block in the (n+1)-th stage, and Nopt_n is the number of the unit cells of the amplifier block in the n-th stage.

6 . The distributed amplifier according to claim 5 , wherein each of the unit cells includes:
a first transistor having a base terminal connected to the first transmission line and an emitter terminal connected to a second power supply voltage, and a second transistor having a base terminal connected to a second bias voltage, a collector terminal connected to the second transmission line, and an emitter terminal connected to the collector terminal of the first transistor.

Assignees

• Ntt Inc

Inventors

• Jo Teruo
• Nagatani Munehiko
• Nosaka Hideyuki

Classifications

• H03F1/0288

  using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title

• H03F2200/36

  the amplifier comprising means for increasing the bandwidth · CPC title

• H03F3/605

  Distributed amplifiers · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F1/22

  by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively · CPC title