Pixel circuit, method for driving pixel circuit, display panel and display apparatus

US12567359B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12567359-B2
Application numberUS-202218692706-A
CountryUS
Kind codeB2
Filing dateSep 30, 2022
Priority dateSep 30, 2022
Publication dateMar 3, 2026
Grant dateMar 3, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A pixel circuit, a method for driving the same, a display panel and a display apparatus, the pixel circuit includes: a light-emitting device; a driving transistor coupled to the light-emitting device; a first control circuit coupled to a gate of the driving transistor; a second control circuit coupled to a first setting electrode of the driving transistor and configured to initialize the first setting electrode of the driving transistor before the light-emitting device is driven to emit light; a third control circuit coupled to the driving transistor and configured to reset the gate of the driving transistor, control the data voltage to be input into the gate of the driving transistor, and control the driving transistor to generate an operating current according to a data voltage to drive the light-emitting device to emit light.

First claim

Opening claim text (preview).

What is claimed is: 1 . A pixel circuit, comprising: a light-emitting device; a driving transistor coupled to the light-emitting device and configured to generate an operating current for driving the light-emitting device according to a data voltage; a first control circuit coupled to a gate of the driving transistor and configured to reduce a leakage current at the gate of the driving transistor based on a signal at a leakage adjustment signal terminal; a second control circuit coupled to a first setting electrode of the driving transistor and configured to initialize the first setting electrode of the driving transistor before the light-emitting device is driven to emit light, wherein the first setting electrode of the driving transistor is a first electrode and/or a second electrode of the driving transistor; and a third control circuit coupled to the driving transistor and configured to reset the gate of the driving transistor, control the data voltage to be input into the gate of the driving transistor, and control the driving transistor to generate the operating current and drive the light-emitting device to emit light, wherein the first control circuit comprises: a first transistor and a second transistor; a gate of the first transistor is coupled to the gate of the driving transistor, a first electrode of the first transistor is floated, and a second electrode of the first transistor is coupled to the leakage adjustment signal terminal; and a gate of the second transistor is coupled to the gate of the driving transistor, a first electrode of the second transistor is floated, and a second electrode of the second transistor is coupled to the leakage adjustment signal terminal, or the first control circuit comprises: a voltage stabilizing capacitor; and a first electrode of the voltage stabilizing capacitor is coupled to the gate of the driving transistor, and a second electrode of the voltage stabilizing capacitor is coupled to the leakage adjustment signal terminal, wherein when the data voltage is input into the driving transistor, the voltage of the signal at the leakage adjustment signal terminal is greater than a difference between the data voltage and a threshold voltage of the driving transistor. 2 . The pixel circuit according to claim 1 , wherein in each display frame, when the gate of the driving transistor is reset, a voltage of a signal at the leakage adjustment signal terminal is a first voltage, and when the data voltage is input to the gate of the driving transistor, the voltage of the signal at the leakage adjustment signal terminal is a second voltage; and the second voltage is not less than the first voltage. 3 . The pixel circuit according to claim 2 , wherein the first voltages for different display frames are the same; for different display frames, the second voltage is greater than a third voltage; and the third voltage is equal to Vda−Vth, Vda representing the data voltage, and Vth representing a threshold voltage of the driving transistor; and the second voltages for different display frames are the same; or the second voltages for different display frames each increase as the third voltage increases. 4 . The pixel circuit according to claim 1 , wherein the second control circuit is further configured to supply, in response to a signal at a first control signal terminal, a signal at a first initialization signal terminal to the first setting electrode of the driving transistor after the data voltage is input, and wherein the signal at the first initialization signal terminal is at a high level or a low level, and in a case where the first initialization signal terminal is at a high level, the first initialization signal terminal and a first power terminal are a single signal terminal. 5 . The pixel circuit according to claim 4 , wherein the second control circuit comprises a third transistor, and a gate of the third transistor is coupled to the first control signal terminal, a first electrode of the third transistor is coupled to the first initialization signal terminal, and a second electrode of the third transistor is coupled to the first setting electrode of the driving transistor. 6 . The pixel circuit according to claim 1 , wherein the third control circuit comprises: a data writing circuit configured to input the data voltage at a data signal terminal to the first electrode of the driving transistor in response to a signal at a second control signal terminal; a reset circuit configured to input a signal at a second initialization signal terminal to a second setting electrode of the driving transistor in response to a signal at a third control signal terminal; the second setting electrode of the driving transistor being a gate or a second electrode of the driving transistor; an initialization circuit configured to input a signal at a third initialization signal terminal to a first electrode of the light-emitting device in response to a signal at a first control signal terminal; a threshold compensation circuit configured to conduct the gate of the driving transistor to the second electrode of the driving transistor in response to a signal at a fourth control signal terminal; and a light emission control circuit configured to conduct the first electrode of the driving transistor to a first power terminal and conduct the second electrode of the driving transistor to the first electrode of the light-emitting device in response to a signal at a light emission control signal terminal, to control the operating current generated by the driving transistor to be inputted to the light-emitting device. 7 . The pixel circuit according to claim 6 , wherein the data writing circuit comprises a fourth transistor, a gate of the fourth transistor is coupled to the second control signal terminal, a first electrode of the fourth transistor is coupled to the data signal terminal, a second electrode of the fourth transistor is coupled to the first electrode of the driving transistor; the reset circuit comprises a fifth transistor, a gate of the fifth transistor is coupled to the third control signal terminal, a first electrode of the fifth transistor is coupled to the second initialization signal terminal, and a second electrode of the fifth transistor is coupled to the second setting electrode of the driving transistor; the initialization circuit comprises a sixth transistor, a gate of the sixth transistor is coupled to the first control signal terminal, a first electrode of the sixth transistor is coupled to the third initialization signal terminal, and a second electrode of the sixth transistor is coupled to the first electrode of the light-emitting device; the threshold compensation circuit comprises a seventh transistor and a storage capacitor, wherein a gate of the seventh transistor is coupled to the fourth control signal terminal, a first electrode of the seventh transistor is coupled to the gate of the driving transistor, a second electrode of the seventh transistor is coupled to the second electrode of the driving transistor, a first electrode of the storage capacitor is coupled to the first power terminal, and a second electrode of the storage capacitor is coupled to the gate of the driving transistor; and the light emission control circuit comprises an eighth transistor and a ninth transistor, a gate of the eighth transistor is coupled to the light emission control signal terminal, a first electrode of the eighth transistor is coupled to the first power terminal, a second electrode of the eighth transistor is coupled to the first electrode of the driving transistor, a gate of the ninth transistor is coupled to the light emission control signal terminal, a first electrode of the ninth transistor is coupled to the second elec

Assignees

Inventors

Classifications

  • for resetting or blanking · CPC title

  • Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

  • Details of a shift registers arranged for use in a driving circuit · CPC title

  • Power management, e.g. power saving · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

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What does patent US12567359B2 cover?
A pixel circuit, a method for driving the same, a display panel and a display apparatus, the pixel circuit includes: a light-emitting device; a driving transistor coupled to the light-emitting device; a first control circuit coupled to a gate of the driving transistor; a second control circuit coupled to a first setting electrode of the driving transistor and configured to initialize the first …
Who is the assignee on this patent?
Chengdu Boe Optoelect Tech Co, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/32. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 03 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).