Selective deposition and cross-linking of polymeric dielectric material

Patent metadata

Field	Value
Publication number	US-12563980-B2
Application number	US-202217586757-A
Country	US
Kind code	B2
Filing date	Jan 27, 2022
Priority date	Jan 27, 2022
Publication date	Feb 24, 2026
Grant date	Feb 24, 2026

Abstract

An exemplary semiconductor structure includes a semiconductor substrate; a plurality of metal lines on top of the semiconductor substrate, each line having a line width 5 nanometers or less: a plurality of dielectric features adjacent to the metal lines; and a plurality of metal vias on top of the metal lines. Out of a random sample of 1000 vias at least 950 vias are fully-aligned to corresponding metal lines.

First claim

What is claimed is:

1 . A method comprising:
forming a self-assembled monolayer (SAM) film by delivering, to a substrate that comprises a metal region and a dielectric region, a first quantity of difunctional molecules that selectively adhere to the metal region; forming a reacted film by delivering a second quantity of diene molecules to active sites of the SAM film, under conditions that promote reaction of the diene molecules with the SAM film; grafting a further layer to the reacted film by delivering a third quantity of difunctional molecules to the reacted film, under conditions that promote reaction of the difunctional molecules with the reacted film; and cross-linking free ends of the further layer by delivering a fourth quantity of trifunctional molecules to the further layer, under conditions that promote reaction of the trifunctional molecules with the further layer.

2 . The method of claim 1 , wherein the difunctional molecules are selected from a list consisting of: dithiols (HS—R—SH), disilanes (Cl 3 Si—R—SiCl 3 ), dialkenes (C═C—R—C═C), dialkanoic acids (HOOC—R—COOH), and diphosphonic acids (H 3 PO 3 —R—PO 3 H 3 ).

3 . The method of claim 1 , further comprising repeating steps of forming a reacted film and grafting a further layer at least one more time before the step of cross-linking free ends of the further layer.

4 . The method of claim 3 , comprising repeating steps of forming a reacted film and grafting a further layer until a thickness of an accumulated film exceeds a width of the metal region.

5 . The method of claim 4 , wherein the width of the metal region is less than 14 nm.

6 . The method of claim 5 , wherein the thickness of the film is greater than 10 nm and the film does not overlap the dielectric region.

7 . The method of claim 1 , wherein a gap in the film is fully-aligned to the dielectric region and the film completely covers the metal region.

Assignees

• IBM

Inventors

• Peethala Cornelius Brown
• Wojtecki Rudy J
• Nguyen Son
• Pranatharthiharan Balasubramanian S

Classifications

• H10P14/683

  carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC · CPC title

• H10W20/42 Primary

  Vias, e.g. via plugs · CPC title

• H10W20/069

  by forming self-aligned vias or self-aligned contact plugs · CPC title

• H10W20/063

  by forming conductive members before forming protective insulating material · CPC title

• H10W20/077

  on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence) · CPC title