Display substrate with isolation groove in planarization layer and preparation method thereof, and display apparatus thereof

Patent metadata

Field	Value
Publication number	US-12563946-B2
Application number	US-202117920404-A
Country	US
Kind code	B2
Filing date	Nov 26, 2021
Priority date	Nov 26, 2021
Publication date	Feb 24, 2026
Grant date	Feb 24, 2026

Abstract

A display substrate includes a base substrate, and a drive circuit layer, a first planarization layer, and an organic encapsulation layer disposed on the base substrate sequentially. The first planarization layer has a first isolation groove in a peripheral region. The organic encapsulation layer includes a first portion and a second portion located in the peripheral region. The second portion is located on a side of first portion close to a display region. The second portion has a first height, a height of the first portion gradually decreasing from the first height to a second height along a direction away from the display region. The first isolation groove is located on a side of first portion close to the display region. An orthographic projection of at least one of the first portion and second portion on the base substrate covers an orthographic projection of the first isolation groove.

First claim

The invention claimed is:

1 . A display substrate, comprising:
a base substrate, and a drive circuit layer, a first planarization layer, and an organic encapsulation layer disposed on the base substrate sequentially; the base substrate comprising a display region and a peripheral region at least partially surrounding the display region; the drive circuit layer located in the peripheral region; the first planarization layer having a first isolation groove in the peripheral region; the organic encapsulation layer comprising a first portion and a second portion located in the peripheral region; the second portion located on a side of the first portion close to the display region; the second portion having a first height, a height of the first portion gradually decreasing from the first height to a second height along a direction away from the display region; the first height being greater than the second height; the first isolation groove located on a side of the first portion close to the display region, and an orthographic projection of at least one of the first portion and the second portion of the organic encapsulation layer on the base substrate covering an orthographic projection of the first isolation groove on the base substrate, wherein the peripheral region comprises multiple circuit regions sequentially arranged along the direction away from the display region, and the first isolation groove is located between two adjacent circuit regions.

2 . The display substrate according to claim 1 , wherein the display substrate further comprises: a second planarization layer located on a side of the first planarization layer away from the base substrate; the second planarization layer having a second isolation groove in the peripheral region, an orthographic projection of the second isolation groove on the base substrate being at least partially overlapped with the orthographic projection of the first isolation groove on the base substrate.

3 . The display substrate according to claim 2 , wherein the orthographic projection of the second isolation groove on the base substrate contains the orthographic projection of the first isolation groove on the base substrate.

4 . The display substrate according to claim 1 , wherein in the peripheral region, the first isolation groove extends along a direction parallel to an edge of the display region.

5 . The display substrate according to claim 1 , wherein the first isolation groove has a first width along the direction away from the display region, and the first width is 4 microns to 15 microns;
in a direction perpendicular to the base substrate, the first isolation groove has a first depth, and the first depth is 1.5 microns to 3.5 microns.

6 . The display substrate according to claim 1 , wherein the multiple circuit regions of the peripheral region comprise: a first circuit region, a second circuit region, and a third circuit region sequentially arranged along the direction away from the display region, or a first circuit region and a second circuit region sequentially arranged along the direction away from the display region;
the first isolation groove is located between the first circuit region and the second circuit region.

7 . The display substrate according to claim 1 , wherein the multiple circuit regions of the peripheral region at least comprise: a first circuit region, a second circuit region, and a third circuit region arranged sequentially along the direction away from the display region; the first isolation groove is located between the second circuit region and the third circuit region.

8 . The display substrate according to claim 6 , wherein the first circuit region is provided with a first drive circuit and multiple first signal lines for supplying control signals to the first drive circuit, and the second circuit region is provided with a second drive circuit and multiple second signal lines for supplying control signals to the second drive circuit;
the orthographic projection of the first isolation groove on the base substrate is located between the first signal lines and the second drive circuit.

9 . The display substrate according to claim 8 , wherein the multiple first signal lines at least comprise: a first initial signal line providing a first initial signal to the first drive circuit; the multiple second signal lines at least comprise: a first power supply line providing a first voltage signal to the second drive circuit;
there is a first distance between an edge in the orthographic projection of the first isolation groove on the base substrate close to the display region and an edge in an orthographic projection of the first initial signal line on the base substrate away from the display region, and there is a second distance between an edge in the orthographic projection of the first isolation groove on the base substrate away from the display region and an edge in an orthographic projection of the first power supply line on the base substrate close to the display region; the first distance is less than the second distance.

10 . The display substrate according to claim 9 , wherein the first distance is 3.5 microns to 4.5 microns, and the second distance is 5.5 microns to 7.2 microns.

11 . The display substrate according to claim 8 , wherein the first drive circuit is electrically connected with multiple first output signal lines and the second drive circuit is electrically connected with multiple second output signal lines; the third circuit region is provided with a third drive circuit, which is electrically connected with multiple third output signal lines; the first output signal lines, the second output signal lines, and the third output signal lines extend toward a direction of the display region;
the orthographic projection of the first isolation groove on the base substrate is overlapped with orthographic projections of the multiple second output signal lines and the multiple third output signal lines on the base substrate.

12 . The display substrate according to claim 11 , wherein the display region is provided with multiple pixel circuits;
the first drive circuit is configured to provide a reset control signal to multiple pixel circuits of the display region through the first output signal lines; the second drive circuit is configured to provide a scan signal to multiple pixel circuits of the display region through the second output signal lines; the third drive circuit is configured to provide a light emitting control signal to multiple pixel circuits of the display region through the third output signal lines.

13 . The display substrate according to claim 1 , wherein the display substrate further comprises: a first inorganic encapsulation layer located on a side of the organic encapsulation layer close to the base substrate, a second inorganic encapsulation layer located on a side of the organic encapsulation layer away from the base substrate, and a touch structure layer located on a side of the second inorganic encapsulation layer away from the base substrate;
the touch structure layer comprises multiple touch leads in the peripheral region; the orthographic projection of the first isolation groove on the base substrate is not overlapped with an orthographic projection of a touch lead on the base substrate, or the orthographic projection of the first isolation groove on the base substrate is overlapped with an orthographic projection of at least one touch lead on the base substrate.

14 . The display substrate according to claim 13 , wherein the multiple touch leads comprise: multiple first touch leads, an isolation lead

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Bai Lu
• Zhang Bo
• Zhou Yang
• Dai Junxiu

Classifications

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G3/3233

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• H10K59/1216

  the pixel elements being capacitors · CPC title

• H10K59/1213

  the pixel elements being TFTs · CPC title

• H10K59/1201

  Manufacture or treatment · CPC title