Display device having a second contact hole passing through the first insulating layer and manufacturing method thereof

US12563926B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12563926-B2
Application numberUS-202318094393-A
CountryUS
Kind codeB2
Filing dateJan 9, 2023
Priority dateJan 24, 2022
Publication dateFeb 24, 2026
Grant dateFeb 24, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes the following elements: a semiconductor layer positioned on a substrate; a first gate insulating layer positioned on the semiconductor layer; a first gate conductive layer positioned on the first gate insulating layer; a second gate insulating layer positioned on the first gate conductive layer; a second gate conductive layer positioned on the second gate insulating layer; a first insulating layer positioned on the second gate conductive layer; a first contact hole passing through the first insulating layer, the second gate insulating layer, and the first gate insulating layer; a second contact hole passing through the first insulating layer; and a third contact hole passing through the first insulating layer and the second gate insulating layer. A cross-section of the first insulating layer in a plane perpendicular to the substrate has a curved profile.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display device comprising: a semiconductor layer positioned on a substrate; a first gate insulating layer positioned on the semiconductor layer; a first gate conductive layer positioned on the first gate insulating layer; a second gate insulating layer positioned on the first gate conductive layer; a second gate conductive layer positioned on the second gate insulating layer; a first insulating layer positioned on the second gate conductive layer; a first contact hole passing through the first insulating layer, the second gate insulating layer, and the first gate insulating layer; a second contact hole passing through the first insulating layer; and a third contact hole passing through the first insulating layer and the second gate insulating layer, wherein a cross-section of the first insulating layer in a plane perpendicular to the substrate has a curved profile, the semiconductor layer includes a first groove, and the first groove is part of the first contact hole. 2 . The display device of claim 1 , further comprising: a data conductive layer positioned on the first insulating layer, wherein the data conductive layer includes: a source electrode electrically connected to the semiconductor layer through the first contact hole; a first connection electrode electrically connected to the second gate conductive layer through the second contact hole; and a second connection electrode electrically connected to the first gate conductive layer through the third contact hole. 3 . The display device of claim 2 , wherein an interface between the data conductive layer and the first insulating layer includes fluorine, a fluorine-based compound, or CFx, and the x is a natural number of 1 or more. 4 . The display device of claim 1 , wherein the semiconductor layer includes a first face, a second face, and a third face, the first face is opposite each of the second face and the third face, the second face is exposed by the first contact hole, the semiconductor layer has a first thickness from the first face to the second face, the semiconductor layer has a second thickness from the first face to the third face, and the second thickness is larger than the first thickness. 5 . The display device of claim 1 , wherein the first gate conductive layer includes a first gate conductive member exposed by the third contact hole, the first gate conductive member includes a first gate conductive sub-member and a second gate conductive sub-member, and the third contact hole extends through the second gate conductive sub-member. 6 . The display device of claim 5 , wherein the second gate conductive layer includes a second gate conductive member exposed by the second contact hole, the second gate conductive member includes a third gate conductive sub-member and a fourth gate conductive sub-member, and the second contact hole extends through the fourth gate conductive sub-member. 7 . The display device of claim 6 , wherein each of the first gate conductive sub-member and the third gate conductive sub-member includes aluminum, and each of the second gate conductive sub-member and the fourth gate conductive sub-member includes titanium. 8 . The display device of claim 2 , further comprising: an auxiliary layer positioned between the data conductive layer and the first insulating layer. 9 . The display device of claim 8 , wherein the auxiliary layer includes amorphous silicon.

Assignees

Inventors

Classifications

  • forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

  • with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

  • used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

  • Layout of electrodes and connections · CPC title

  • Manufacture or treatment · CPC title

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Frequently asked questions

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What does patent US12563926B2 cover?
A display device includes the following elements: a semiconductor layer positioned on a substrate; a first gate insulating layer positioned on the semiconductor layer; a first gate conductive layer positioned on the first gate insulating layer; a second gate insulating layer positioned on the first gate conductive layer; a second gate conductive layer positioned on the second gate insulating la…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/131. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 24 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).