Method for transmitting 360-degree video, method for receiving 360-degree video, 360-degree video transmitting device, and 360-degree video receiving device
US-2019199921-A1 · Jun 27, 2019 · US
Configurable NAL and slice code point mechanism for stream merging
US12563235B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12563235-B2 |
| Application number | US-202418734094-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 5, 2024 |
| Priority date | Sep 3, 2019 |
| Publication date | Feb 24, 2026 |
| Grant date | Feb 24, 2026 |
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- Title
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Abstract
Official abstract text for this publication.
A video decoding apparatus includes processing circuitry configured to perform operations comprising: receiving, from a video data stream, a sequence parameter set (SPS); parsing, from the SPS, an extra slice header bit map; mapping one or more bits in the extra slice header bit map to one or more flags that indicate presence or non-presence corresponding to a syntax element in a slice header; determining a number of extra slice header bits based on an amount of the one or more flags that indicate presence; and parsing, from the video data stream, the syntax element in the slice header based on the determined number of extra slice header bits.
First claim
Opening claim text (preview).
The invention claimed is: 1 . A video decoding apparatus comprising: processing circuitry configured to perform operations comprising: receiving, from a video data stream, a sequence parameter set (SPS); parsing, from the SPS, an extra slice header bit map; mapping one or more bits in the extra slice header bit map to one or more flags that indicate presence or non-presence corresponding to a syntax element in a slice header; determining a number of extra slice header bits based on an amount of the one or more flags that indicate presence; and parsing, from the video data stream, the syntax element in the slice header based on the determined number of extra slice header bits. 2 . The video decoding apparatus of claim 1 , the operations further comprising: determining, based on the determined number of extra slice header bits, a position of the syntax element in the slice header. 3 . The video decoding apparatus of claim 1 , the operations further comprising: determining, based on the determined number of extra slice header bits, a position of a second syntax element in the slice header. 4 . The video decoding apparatus of claim 1 , wherein the amount of the one or more flags that indicate presence is determined based on counting how many of the one or more flags indicate presence. 5 . The video decoding apparatus of claim 1 , wherein each of the one or more flags comprises a one-bit value. 6 . A method of video decoding comprising: receiving, from a video data stream, a sequence parameter set (SPS); parsing, from the SPS, an extra slice header bit map; mapping one or more bits in the extra slice header bit map to one or more flags that indicate presence or non-presence corresponding to a syntax element in a slice header; determining a number of extra slice header bits based on an amount of the one or more flags that indicate presence; and parsing, from the video data stream, the syntax element in the slice header based on the determined number of extra slice header bits. 7 . The method of claim 6 , further comprising: determining, based on the determined number of extra slice header bits, a position of the syntax element in the slice header. 8 . The method of claim 6 , further comprising: determining, based on the determined number of extra slice header bits, a position of a second syntax element in the slice header. 9 . The method of claim 6 , wherein the amount of the one or more flags that indicate presence is determined based on counting how many of the one or more flags indicate presence. 10 . The method of claim 6 , wherein each of the one or more flags comprises a one-bit value. 11 . A non-transitory computer-readable medium comprising instructions, which when executed by processing circuitry, perform the method of claim 6 . 12 . A method of video encoding comprising: providing, via a video data stream, a sequence parameter set (SPS); encoding, in the SPS, an extra slice header bit map that maps one or more bits in the extra slice header bit map to one or more flags that indicate presence or non-presence corresponding to a syntax element in a slice header; determining a number of extra slice header bits based on an amount of the one or more flags that indicate presence; and providing, via the video data stream, the syntax element in the slice header based on the determined number of extra slice header bits. 13 . The method of claim 12 , further comprising: determining, based on the determined number of extra slice header bits, a position of the syntax element in the slice header. 14 . The method of claim 12 , further comprising: determining, based on the determined number of extra slice header bits, a position of a second syntax element in the slice header. 15 . The method of claim 12 , wherein the amount of the one or more flags that indicate presence is determined based on counting how many of the one or more flags indicate presence. 16 . The method of claim 12 , wherein each of the one or more flags comprises a one-bit value. 17 . A non-transitory computer-readable medium comprising instructions, which when executed by processing circuitry, perform the method of claim 12 . 18 . A video encoding apparatus comprising: processing circuitry configured to perform the method of claim 12 .
Assignees
Inventors
Classifications
Embedding additional information in the video signal during the compression process (H04N19/517, H04N19/68, H04N19/70 take precedence) · CPC title
the unit being bits, e.g. of the compressed video stream · CPC title
the region being a slice, e.g. a line of blocks or a group of blocks · CPC title
- H04N19/188Primary
the unit being a video data packet, e.g. a network abstraction layer [NAL] unit · CPC title
specially adapted for multi-view video sequence encoding · CPC title
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Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US12563235B2 cover?
- A video decoding apparatus includes processing circuitry configured to perform operations comprising: receiving, from a video data stream, a sequence parameter set (SPS); parsing, from the SPS, an extra slice header bit map; mapping one or more bits in the extra slice header bit map to one or more flags that indicate presence or non-presence corresponding to a syntax element in a slice header; …
- Who is the assignee on this patent?
- Fraunhofer Ges Forschung
- What technology area does this patent fall under?
- Primary CPC classification H04N19/188. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).