Persistent memory across updates

Patent metadata

Field	Value
Publication number	US-12561076-B2
Application number	US-202418747185-A
Country	US
Kind code	B2
Filing date	Jun 18, 2024
Priority date	Jun 18, 2024
Publication date	Feb 24, 2026
Grant date	Feb 24, 2026

Abstract

A method for updating a device includes receiving an instruction to update from a first configuration in the device to a second configuration, where a first heap memory allocated to the first configuration includes multiple first allocated memory blocks and corresponding first memory blocks metadata. The method also includes performing a warm reset, the reset including determining, based on the first memory blocks metadata, that when updating from the first configuration to the second configuration, data of at least one of the first allocated memory blocks should be persisted to a second heap memory allocated to the second configuration, and causing the device to update from the first configuration to the second configuration, where the update includes persisting, based on the first memory blocks metadata, the data of at least one of the first allocated memory blocks to a second heap memory allocated to the second configuration.

First claim

What is claimed is:

1 . A method for updating a device, the method comprising:
receiving an instruction to update from a first configuration of the device to a second configuration of the device, wherein:
a first heap memory allocated to the first configuration comprises a plurality of first allocated memory blocks and corresponding first memory blocks metadata, and
the instruction comprises an indication of whether to update using a cold reset or a warm reset; and
performing the warm reset based on the indication, wherein performing the warm reset comprises:
determining, based on the first memory blocks metadata, that when updating from the first configuration to the second configuration, data of at least one of the first allocated memory blocks should be persisted to a second heap memory allocated to the second configuration,
dividing the first heap memory into at least two portions of the first heap memory by assigning a static address between respective portions of the at least two portions of the first heap memory, wherein:
a first portion of the at least two portions comprises at least one first allocated memory block storing the data that should be persisted; and
a second portion of the at least two portions comprises at least one second allocated memory storing data that should not be persisted, and

causing the device to update from the first configuration to the second configuration, wherein the update comprises persisting, based on the first memory blocks metadata, the data of at least one of the first allocated memory blocks to a second heap memory allocated to the second configuration.

2 . The method of claim 1 , wherein:
memory of the device stores a first data structure; the first data structure stores data that is associated with the first memory blocks metadata; and the determining that the data of at least one of the first allocated memory blocks should be persisted is based on reading the first data structure.

3 . The method of claim 2 , wherein:
the first data structure comprises pointers to respective metadata of the first memory blocks metadata; reading the first data structure comprises following the pointers; the first memory blocks metadata comprise respective block tags; and reading the first data structure comprises, based on following the pointers, reading the respective block tags.

4 . The method of claim 1 , wherein:
the second heap memory allocated to the second configuration comprises a second plurality of allocated memory blocks; and performing the warm reset further comprises:
generating second memory blocks metadata corresponding to the second plurality of allocated memory blocks;
generating a second data structure storing data that is associated with the second memory blocks metadata;
storing the second memory blocks metadata in the second heap memory allocated to the second configuration; and
storing the second data structure in memory of the device.

5 . The method of claim 4 , wherein storing the second memory blocks metadata comprises storing respective portions of the second memory blocks metadata adjacent to a corresponding memory block of the second plurality of allocated memory blocks.

6 . The method of claim 1 , wherein persisting, based on the first memory blocks metadata, the data of at least one of the first allocated memory blocks, is further based on at least one property of the second configuration.

7 . The method of claim 1 , wherein the first configuration is based on a first firmware and the second configuration is based on a second firmware, different from the first firmware.

8 . A system comprising:
a first heap memory allocated to a first configuration, the first heap memory comprising a plurality of first allocated memory blocks and corresponding first memory blocks metadata; and control circuitry coupled to the first heap memory, the control circuitry to:
receive an instruction to update from the first configuration to a second configuration, wherein the instruction comprises an indication of whether to update using a cold reset or a warm reset; and
perform the warm reset based on the indication, wherein to perform the warm reset comprises:
determining, based on the first memory blocks metadata, that when updating from the first configuration to the second configuration, data of at least one of the first allocated memory blocks should be persisted to a second heap memory allocated to the second configuration,
dividing the first heap memory into at least two portions of the first heap memory by assigning a static address between respective portions of the at least two portions of the first heap memory, wherein:
a first portion of the at least two portions comprises at least one first allocated memory block comprising the data that should be persisted; and
a second portion of the at least two portions comprises at least one second allocated memory comprising data that should not be persisted, and

causing a device to update from the first configuration to the second configuration, wherein the update comprises persisting, based on the first memory blocks metadata, the data of at least one of the first allocated memory blocks to a second heap memory allocated to the second configuration.

9 . The system of claim 8 , wherein:
memory of the device comprises a first data structure; the first data structure comprises data that is associated with the first memory blocks metadata; and the control circuitry is further to determine that the data of at least one of the first allocated memory blocks should be persisted based on reading the first data structure.

10 . The system of claim 9 , wherein:
the first data structure comprises pointers to respective metadata of the first memory blocks metadata; the first memory blocks metadata comprise respective block tags; and the control circuitry is further to:
follow the pointers when reading the first data structure, and
read the respective block tags based on following the pointers.

11 . The system of claim 8 , wherein:
the second heap memory allocated to the second configuration comprises a second plurality of allocated memory blocks; and the control circuitry is further to perform the warm reset by:
generating second memory blocks metadata corresponding to the second plurality of allocated memory blocks;
generating a second data structure storing data that is associated with the second memory blocks metadata;
storing the second memory blocks metadata in the second heap memory allocated to the second configuration; and
storing the second data structure in memory of the device.

12 . The system of claim 11 , wherein the control circuitry is further to store respective portions of the second memory blocks metadata adjacent to a corresponding memory block of the second plurality of allocated memory blocks.

13 . The system of claim 8 , wherein the control circuitry is further to persist the data of at least one of the first allocated memory blocks further based on at least one property of the second configuration.

14 . The system of claim 8 , wherein the first configuration is based on a first firmware and the second configuration is based on a second firmware, different from the first firmware.

15 . A memory for maintaining information about memory blocks, the memory comprising:
a plurality of memory blocks; and a data structure comprising:
a parent node comprising pointers to a plurality of child nodes; and
the plurality of child nodes, wherein each child node of the plurality of child nodes is associated with a respective

Assignees

• Sk Hynix Nand Product Solutions Corp

Inventors

• Fitzpatrick Matthew
• Valine Craig
• Rajagopalan Kailaash
• Govindane Mahesh
• Povilus Sam

Classifications

• G06F3/0604

  Improving or facilitating administration, e.g. storage management · CPC title

• G06F3/0673 Primary

  Single storage device · CPC title

• G06F3/0631 Primary

  by allocating resources to storage systems · CPC title