Display panel and display apparatus

Patent metadata

Field	Value
Publication number	US-12557475-B2
Application number	US-202117914516-A
Country	US
Kind code	B2
Filing date	Nov 22, 2021
Priority date	Mar 23, 2021
Publication date	Feb 17, 2026
Grant date	Feb 17, 2026

Abstract

A display panel includes a base substrate, and pixel driving circuits disposed on the base substrate. A pixel driving circuit in the pixel driving circuits includes a driving transistor and a capacitor. A gate of the driving transistor is farther from the base substrate than an active layer of the driving transistor. An active portion of the active layer includes edges that are flush with respective edges of the gate. A first electrode plate of the capacitor is coupled to the gate of the driving transistor. A second electrode plate of the capacitor is disposed on a side of the gate away from the base substrate, and is able to shield light. Orthographic projections, on the base substrate, of the edges of the active portion that are flush with respective edges of the gate are located within an orthographic projection of the second electrode plate on the base substrate.

First claim

What is claimed is:

1 . A display panel, comprising:
a base substrate; and pixel driving circuits disposed on the base substrate, a pixel driving circuit in the pixel driving circuits including a driving transistor, a capacitor, a light-shielding metal layer, a first switching transistor, a second conductive pattern, a first insulating layer and a second insulating layer; wherein the driving transistor includes a gate and an active layer, and the active layer of the driving transistor includes an active portion, a first conductive portion and a second conductive portion; the gate is farther from the base substrate than the active layer of the driving transistor; and the active portion of the driving transistor includes edges that are flush with respective edges of the gate; the capacitor includes a first electrode plate and a second electrode plate arranged opposite to each other in a thickness direction of the base substrate; the first electrode plate is coupled to the gate of the driving transistor; the second electrode plate is disposed on a side of the gate away from the base substrate, and is able to shield light; and orthographic projections, on the base substrate, of the edges of the active portion of the driving transistor that are flush with the respective edges of the gate are located within an orthographic projection of the second electrode plate on the base substrate; the light-shielding metal layer is disposed on a side of the active layer of the driving transistor proximate to the base substrate; and an orthographic projection of the active portion of the driving transistor on the base substrate is located within an orthographie projection of the light-shielding metal layer on the base substrate, and the light-shielding metal layer is coupled to the second electrode plate; the first switching transistor includes an active layer including an active portion, a first conductive portion and a second conductive portion; the first conductive portion of the first switching transistor is used for receiving a reset signal or providing a sensing signal, and the second conductive portion of the first switching transistor is coupled to the second electrode plate; the second conductive portion of the first switching transistor has a third contact portion, and the third contact portion is in contact with the second conductive pattern; and the active layer of the first switching transistor is arranged in a same layer as the active layer of the driving transistor, and the second conductive pattern is arranged in a same layer as the second electrode plate; and the first insulating layer is disposed between the active layer of the first switching transistor and the second conductive pattern, and the second insulating layer is disposed between the active layer of the first switching transistor and the light-shielding metal layer, wherein a first via is provided in the first insulating layer, and a second via is provided in the second insulating layer; an orthogonal projection of the first via on the base substrate is overlapped with an orthogonal projection of the second via on the base substrate; and the second conductive pattern is in contact with the third contact portion through the first via, and the light-shielding metal layer is coupled to the third contact portion through the second via.

2 . The display panel according to claim 1 , wherein
the orthographic projection of the active portion of the driving transistor on the base substrate is located within the orthographic projection of the second electrode plate on the base substrate.

3 . The display panel according to claim 1 , wherein the driving transistor further includes a first conductive pattern; and
the first conductive portion of the driving transistor has a first contact portion, and the second conductive portion of the driving transistor has a second contact portion; and the first contact portion is in contact with the first conductive pattern, and the second contact portion is in contact with the second electrode plate.

4 . The display panel according to claim 3 , wherein the first conductive pattern is arranged in a same layer as the second electrode plate; and the first contact portion is farther from the active portion of the driving transistor than the second contact portion.

5 . The display panel according to claim 1 , wherein
the second electrode plate and the second conductive pattern are connected into an integral structure; or the orthographic projection of the second electrode plate on the base substrate is spaced apart from an orthographic projection of the second conductive pattern on the base substrate, and the second conductive pattern and the second electrode plate are coupled to the light-shielding metal layer.

6 . The display panel according to claim 5 , wherein
the second conductive pattern is opposite to the second electrode plate in a first direction and a second direction; and the first direction and the second direction are two directions that are parallel to a plane where the base substrate is located and perpendicular to each other.

7 . The display panel according to claim 1 , wherein
the first electrode plate is arranged in a same layer as the active layer of the driving transistor; and an orthographic projection of the first electrode plate on the base substrate is overlapped with the orthographic projection of the second electrode plate on the base substrate.

8 . The display panel according to claim 1 , wherein
the pixel driving circuit further includes a second switching transistor; wherein the second switching transistor includes an active layer, and the active layer of the second switching transistor includes an active portion, a first conductive portion and a second conductive portion; and the first conductive portion of the second switching transistor is used for receiving a data signal, and the second conductive portion of the second switching transistor is coupled to the gate of the driving transistor.

9 . The display panel according to claim 8 , further comprising a data line disposed on the base substrate; wherein
the first conductive portion of the second switching transistor is coupled to the data line.

10 . The display panel according to claim 1 , further comprising a power line disposed on the base substrate; wherein
the first conductive portion of the driving transistor in the pixel driving circuit is coupled to the power line.

11 . The display panel according to claim 10 , wherein
the driving transistor further includes a first conductive pattern; the first conductive portion of the driving transistor has a first contact portion, and the second conductive portion of the driving transistor has a second contact portion; the first contact portion is in contact with the first conductive pattern, and the second contact portion is in contact with the second electrode plate; and the power line is arranged in a same layer as the first conductive pattern, and the power line is in contact with the first conductive pattern.

12 . The display panel according to claim 10 , wherein the pixel driving circuit further includes a third conductive pattern arranged in a same layer as the light-shielding metal layer, and the third conductive pattern is coupled to the first conductive portion of the driving transistor and the power line.

13 . The display panel according to claim 1 , further comprising a sensing signal line disposed on the base substrate; wherein
the first conductive portion of the first switching transistor is coupled to the sensing signal line.

14 . The display panel according to claim 13

Assignees

• Hefei Xinsheng Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Huang Yongchao
• Wang Qinghe Wang
• Cheng Leilei
• Su Tongshang
• Liu Jun
• Wang Chao
• Cheng Jun
• Yan Liangchen

Classifications

• H10K59/8792 Primary

  comprising light absorbing layers, e.g. black layers · CPC title

• H10K59/1216

  the pixel elements being capacitors · CPC title

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/126

  Shielding, e.g. light-blocking means over the TFTs · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title