Parallel-to-serial conversion circuit
US-2020195274-A1 · Jun 18, 2020 · US
US12557206B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12557206-B2 |
| Application number | US-202418645487-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 25, 2024 |
| Priority date | Oct 29, 2021 |
| Publication date | Feb 17, 2026 |
| Grant date | Feb 17, 2026 |
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A control circuit for at least two drivers is provided. Each of the two drivers is configured to switch on and off electrically driven switching elements that are electrically connected to each other. The control circuit includes a first parallel-to-serial-converter including a first parallel input port and a first serial output-port connectable to a first driver, a second parallel-to-serial-converter including a second parallel input port and a second serial output-port connectable to a second driver, and a processor unit configured to send a first data package stream to the first parallel input port, and send a second data package stream to the second parallel input port. Both the first data package stream and the second data package stream are configured to be converted to serial-data-streams at the first serial output-port and the second serial output-port, respectively. The serial data-streams are configured to control the at least two drivers.
Opening claim text (preview).
The invention claimed is: 1 . A control circuit for at least two drivers, each of the two drivers is configured to switch on and off electrically driven switching elements that are electrically connected to each other, the control circuit comprising: a first parallel-to-serial-converter comprising a first parallel input port and a first serial output port connectable to a first driver of the two drivers; a second parallel-to-serial-converter comprising a second parallel input port and a second serial output port connectable to a second driver of the two drivers; a processor unit configured to: send a first data package stream to the first parallel input port, and send a second data package stream to the second parallel input port; and a built-in transceiver, wherein both the first data package stream and the second data package stream are configured to be converted to serial data streams at the first serial output port and the second serial output port, respectively, and wherein the serial data streams are configured to control the at least two drivers. 2 . The control circuit of claim 1 , wherein the control circuit is a logical programmable unit. 3 . The control circuit of claim 1 , further comprising a non-volatile memory with a computer readable program stored thereon, the program executable by the processor unit, wherein the program is configured to cause the processor unit to generate the first data package stream and the second data package stream. 4 . The control circuit of claim 1 , further comprising a system clock generator configured to generate a system clock, where a frequency of the serial data streams at the first serial output-port and the second serial output port is higher than a frequency of the system clock. 5 . The control circuit of claim 1 , wherein the control circuit is configured to adjust time parameters of the electrically driven switching elements, the time parameters comprising at least one of a phase, a pulse width, a frequency, or a dead time. 6 . The control circuit of claim 1 , further comprising a built-in serializer-deserializer unit built in the transceiver. 7 . The control circuit of claim 1 , comprising multiple transceivers and/or multiple serializer-deserializers. 8 . The control circuit of claim 7 , wherein the multiple transceivers and/or the multiple serializer-deserializers are clocked by the same system clock. 9 . The control circuit of claim 1 , wherein the first data package stream and the second data package stream are configured such that the electrically driven switching elements are synchronized at outputs thereof. 10 . The control circuit of claim 1 , further comprising a control unit, wherein the control unit comprises a data interface configured to get data from an external data processing device. 11 . A switching unit comprising: at least two electrically driven switching elements; at least two drivers, wherein each of the at least two drivers is configured to switch on and off the at least two electrically driven switching elements that are electrically connected to each other; and at least one control circuit for the at least two drivers, the at least one control circuit comprising: a first parallel-to-serial-converter comprising a first parallel input port and a first serial output port connectable to a first driver of the at least two drivers; a second parallel-to-serial-converter comprising a second parallel input port and a second serial output port connectable to a second driver of the at least two drivers; a processor unit configured to: send a first data package stream to the first parallel input port, and send a second data package stream to the second parallel input port; and a built-in transceiver, wherein both the first data package stream and the second data package stream are configured to be converted to serial data streams at the first serial output port and the second serial output port, respectively, and wherein the serial data streams are configured to control the at least two drivers. 12 . The switching unit of claim 11 , wherein the at least one control circuit comprises at least two control circuits drivable or driven by the same system clock. 13 . A switching system, comprising the switching unit according to claim 11 , and an external data processing device. 14 . The switching system of claim 13 further comprising an external clock generator. 15 . A power supply system comprising the switching system according to claim 13 . 16 . A plasma system comprising the power supply system according to claim 15 and a plasma process unit.
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