Coupling data quantum bits to auxiliary quantum bits

Patent metadata

Field	Value
Publication number	US-12555017-B2
Application number	US-202217897614-A
Country	US
Kind code	B2
Filing date	Aug 29, 2022
Priority date	Aug 29, 2022
Publication date	Feb 17, 2026
Grant date	Feb 17, 2026

Abstract

A device comprises a data quantum bit, a first quantum bit coupler, a second quantum bit coupler, and an auxiliary quantum bit. The first quantum bit coupler is coupled to the data quantum bit. The second quantum bit coupler is coupled to the first quantum bit coupler. The auxiliary quantum bit is coupled to the second quantum bit coupler. The first quantum bit coupler is configured to operate in a state to suppress interaction between the data quantum bit and the auxiliary quantum bit. The first quantum bit coupler and the second quantum bit coupler are each configured to operate in a respective state to enable interaction between the data quantum bit and the auxiliary quantum bit and entangle a state of the data quantum bit with a state of the auxiliary quantum bit.

First claim

What is claimed is:

1 . A device, comprising:
a first data quantum bit; a first quantum bit coupler which is coupled to the first data quantum bit; a second quantum bit coupler which is coupled to the first quantum bit coupler; and an auxiliary quantum bit which is coupled to the second quantum bit coupler; wherein the first quantum bit coupler is configured to operate in a state to suppress interaction between the first data quantum bit and the auxiliary quantum bit; and wherein the first quantum bit coupler and the second quantum bit coupler are each configured to operate in a respective state to enable interaction between the first data quantum bit and the auxiliary quantum bit and entangle a state of the first data quantum bit with a state of the auxiliary quantum bit.

2 . The device of claim 1 , wherein the first data quantum bit and the auxiliary quantum bit each comprise a transmon quantum bit.

3 . The device of claim 1 , further comprising:
a second data quantum bit; and a third quantum bit coupler which is coupled to the second data quantum bit and to the second quantum bit coupler; wherein the third quantum bit coupler is configured to operate in a state to suppress interaction between the second data quantum bit and the first data quantum bit and to suppress interaction between the second data quantum bit and the auxiliary quantum bit; and wherein the third quantum bit coupler and the second quantum bit coupler are each configured to operate in a respective state to enable interaction between the second data quantum bit and the auxiliary quantum bit and entangle a state of the second data quantum bit with the state of the auxiliary quantum bit.

4 . The device of claim 3 , further comprising:
a capacitive bus which is configured to capacitively couple the first quantum bit coupler and the third quantum bit coupler to the second quantum bit coupler, wherein the capacitive bus comprises: a first capacitor pad connected to the first quantum bit coupler by a first transmission line; a second capacitor pad connected to the second quantum bit coupler by a second transmission line; and a third capacitor pad connected to the third quantum bit coupler by a third transmission line; wherein the first capacitor pad and the third capacitor pad are disposed adjacent to a first edge and a second edge, respectively, of the second capacitor pad, and wherein the second capacitor pad has a size which is greater than a size of the first capacitor pad and a size of the third capacitor pad.

5 . The device of claim 1 , wherein the first quantum bit coupler and the second quantum bit coupler each comprise a flux-tunable transmon quantum bit.

6 . The device of claim 1 , wherein the auxiliary quantum bit comprises a quadrupole transmon quantum bit.

7 . The device of claim 1 , wherein:
the first quantum bit coupler comprises a first multimode quantum bit which comprises a first mode and a second mode; the second quantum bit coupler comprises a second multimode quantum bit which comprises a first mode and a second mode.

8 . The device of claim 7 , wherein:
the first data quantum bit is capacitively coupled to the first mode of the first multimode quantum bit; the auxiliary quantum bit is capacitively coupled to the first mode of the second multimode quantum bit; the second mode of the first multimode quantum bit is capacitively coupled to the second mode of the second multimode quantum bit; the first quantum bit coupler is configured to operate in state in which the first data quantum bit is exchange-coupled to only the first mode of the first multimode quantum bit; the first quantum bit coupler is configured to operate in state in which the first data quantum bit is exchange-coupled to both the first mode and the second mode of the first multimode quantum bit; the second quantum bit coupler is configured to operate in state in which the auxiliary quantum bit is exchange-coupled to only the first mode of the second multimode quantum bit; and the second quantum bit coupler is configured to operate in state in which the auxiliary quantum bit is exchange-coupled to both the first mode and the second mode of the second multimode quantum bit.

9 . A system, comprising;
a quantum processor comprising an array of quantum bits; and a control system configured to generate control signals to control the quantum processor; wherein the array of quantum bits comprises:
a first data quantum bit;
a first quantum bit coupler which is coupled to the first data quantum bit;
a second quantum bit coupler which is coupled to the first quantum bit coupler; and
an auxiliary quantum bit which is coupled to the second quantum bit coupler;
wherein the first quantum bit coupler is configured to operate in a state to suppress interaction between the first data quantum bit and the auxiliary quantum bit; and
wherein the first quantum bit coupler and the second quantum bit coupler are each configured to operate in a respective state to enable interaction between the first data quantum bit and the auxiliary quantum bit and entangle a state of the first data quantum bit with a state of the auxiliary quantum bit.

10 . The system of claim 9 , wherein the first data quantum bit and the auxiliary quantum bit each comprise a transmon quantum bit.

11 . The system of claim 9 , wherein the array of quantum bits further comprises:
a second data quantum bit; and a third quantum bit coupler which is coupled to the second data quantum bit and to the second quantum bit coupler; wherein the third quantum bit coupler is configured to operate in a state to suppress interaction between the second data quantum bit and the first data quantum bit and to suppress interaction between the second data quantum bit and the auxiliary quantum bit; and wherein the third quantum bit coupler and the second quantum bit coupler are each configured to operate in a respective state to enable interaction between the second data quantum bit and the auxiliary quantum bit and entangle a state of the second data quantum bit with the state of the auxiliary quantum bit.

12 . The system of claim 11 , further comprising:
a capacitive bus which is configured to capacitively couple the first quantum bit coupler and third quantum bit coupler to the second quantum bit coupler, wherein the capacitive bus comprises: a first capacitor pad connected to the first quantum bit coupler by a first transmission line; a second capacitor pad connected to the second quantum bit coupler by a second transmission line; and a third capacitor pad connected to the third quantum bit coupler by a third transmission line; wherein the first capacitor pad and the third capacitor pad are disposed adjacent to a first edge and a second edge, respectively, of the second capacitor pad, and wherein the second capacitor pad has a size which is greater than a size of the first capacitor pad and a size of the third capacitor pad.

13 . The system of claim 9 , wherein the first quantum bit coupler and the second quantum bit coupler each comprise a flux-tunable transmon quantum bit.

14 . The system of claim 9 , wherein the auxiliary quantum bit comprises a quadrupole transmon quantum bit.

15 . The system of claim 9 , wherein:
the first quantum bit coupler comprises a first multimode quantum bit which comprises a first mode and a second mode; and the second quantum bit coupler comprises a second multimode quantum bit which comprises a first mode and a second mode.

16 . The system of claim 15 , wherein:
the first data quantum bit

Assignees

• IBM

Inventors

• Finck Aaron
• Blair John
• Dial Oliver

Classifications

• G06N10/70

  Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation · CPC title

• G06N10/40 Primary

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title