Display back plate and display device

Patent metadata

Field	Value
Publication number	US-12550442-B2
Application number	US-202218027131-A
Country	US
Kind code	B2
Filing date	Apr 29, 2022
Priority date	Apr 29, 2022
Publication date	Feb 10, 2026
Grant date	Feb 10, 2026

Abstract

A display back plate and a display device are provided. The display back plate includes multiple display units on a base substrate, at least one display unit includes a pixel region for displaying image and a light transmissive region allowing light to transmit; the pixel region includes a first trace layer and a second trace layer disposed in different layers along a thickness direction of the base substrate; and the pixel region further includes a first dielectric layer and a second dielectric layer between the first trace layer and the second trace layer, a ratio of a thickness of the first trace layer to that of the second trace layer is greater than 5; a sum of a thickness of the first dielectric layer and a thickness of the second dielectric layer is greater than 3 μm, and the thickness of the first dielectric layer is less than 2 μm.

First claim

The invention claimed is:

1 . A display back plate, comprising a display area and a bonding area, the display area comprising a plurality of display units on a base substrate, wherein at least one display unit comprises a pixel region configured to perform image display and a light transmissive region, the light transmissive region is located in an area other than the pixel region in the at least one display unit, the light transmissive region is configured to allow light to transmit, to enable the at least one display unit to implement transparent display, the pixel region comprises a first trace layer and a second trace layer disposed in different layers along a thickness direction of the base substrate; and the pixel region further comprises a first dielectric layer and a second dielectric layer located between the first trace layer and the second trace layer;
wherein a ratio of a thickness of the first trace layer to a thickness of the second trace layer is greater than 5; a sum of a thickness of the first dielectric layer and a thickness of the second dielectric layer is greater than 3 μm, and the thickness of the first dielectric layer is less than 2 μm; the first trace layer comprises a plurality of first traces, the plurality of first traces comprise first portions extending in a first direction; and the second trace layer comprises a plurality of second traces, the plurality of second traces comprise second portions extending in a second direction, wherein the first direction intersects the second direction.

2 . The display back plate according to claim 1 , wherein at least one first trace of the plurality of first traces comprises at least one of a first scan line, a data signal line, a ground line, a first drive line, and a second drive line.

3 . The display back plate according to claim 1 , wherein a first portion of at least one first trace of the plurality of first traces comprises a first edge and a second edge opposite to each other in the first direction, the pixel region further comprises at least one first light emitting device, at least one second light emitting device and at least one third light emitting device, orthographic projections of the at least one first light emitting device, the at least one second light emitting device and the at least one third light emitting device on the base substrate are all located in an area defined by the first edge and the second edge.

4 . The display back plate according to claim 3 , wherein each of the at least one first light emitting device, the at least one second light emitting device, and the at least one third light emitting device is one of a sub-millimeter light emitting diode and a micro light emitting diode; or
the pixel region further comprises a pixel drive chip configured to provide a drive signal to at least one of the at least one first light emitting device, the at least one second light emitting device, and the at least one third light emitting device.

5 . The display back plate according to claim 4 , wherein the pixel region further comprises a third dielectric layer, the third dielectric layer is provided with a first groove and a second groove, the first groove is configured to print a solder paste connected to at least one of the at least one first light emitting device, the at least one second light emitting device and the at least one third light emitting device, and the second groove is configured to print a solder paste connected to the pixel drive chip.

6 . The display back plate according to claim 1 , wherein a first portion of at least one first trace of the plurality of first traces comprises a first edge and a second edge opposite to each other in the first direction, an orthographic projection of the first portion of the at least one first trace on the base substrate is within an orthographic projection of the first dielectric layer on the base substrate, one of the first dielectric layer and the second dielectric layer has a third edge and a fourth edge opposite to each other in the first direction, the first edge and the third edge are located at a same side of the at least one first trace, the second edge and the fourth edge are located at a same side of the at least one first trace, a first perpendicular distance from the first edge to the third edge is greater than or equal to 20 μm, and a second perpendicular distance from the second edge to the fourth edge is greater than or equal to 20 μm.

7 . The display back plate according to claim 6 , wherein the first dielectric layer comprises a first strip-shaped area extending in the second direction, the second dielectric layer comprises a second strip-shaped area extending in the second direction, an orthographic projection of the first strip-shaped area on the base substrate is within an orthographic projection of the second strip-shaped area on the base substrate, and an area of the orthographic projection of the first strip-shaped area is smaller than an area of the orthographic projection of the second strip-shaped area; or
the orthographic projection of the first strip-shaped area on the base substrate coincides with the orthographic projection of the second strip-shaped area on the base substrate; or the orthographic projection of the second strip-shaped area on the base substrate is within the orthographic projection of the first strip-shaped area on the base substrate, and the area of the orthographic projection of the second strip-shaped area is smaller than the area of the orthographic projection of the first strip-shaped area.

8 . The display back plate according to claim 1 , wherein a second portion of at least one second trace comprises a fifth edge and a sixth edge opposite to each other in the second direction, an orthographic projection of the second portion of the at least one second trace on the base substrate is within an orthographic projection of the first dielectric layer on the base substrate, one of the first dielectric layer and the second dielectric layer has a seventh edge and an eighth edge opposite to each other in the second direction, the fifth edge and the seventh edge are located at a same side of the second direction of the second trace, the sixth edge and the eighth edge are located at a same side of the second direction of the second trace, a third perpendicular distance from the fifth edge to the seventh edge is greater than or equal to 20 μm, and a fourth perpendicular distance from the sixth edge to the eighth edge is greater than or equal to 20 μm.

9 . The display back plate according to claim 8 , wherein the first dielectric layer comprises third strip-shaped area extending in the first direction, the second dielectric layer comprises a fourth strip-shaped area extending in the first direction, an orthographic projection of the third strip-shaped area on the base substrate is within an orthographic projection of the fourth strip-shaped area on the base substrate, and an area of the orthographic projection of the third strip-shaped area is smaller than an area of the orthographic projection of the fourth strip-shaped area; or
the orthographic projection of the third strip-shaped area on the base substrate coincides with the orthographic projection of the fourth strip-shaped area on the base substrate; or the orthographic projection of the fourth strip-shaped area on the base substrate is within the orthographic projection of the third strip-shaped area on the base substrate, and an area of the orthographic projection of the fourth strip-shaped area is smaller than an area of the orthographic projection of the third strip-shaped area.

10 . The display back plate according to claim 1 , wherein the pixel region further comprises a

Assignees

• Boe Technology Group Co Ltd

Inventors

• Yue Yang
• Shu Shi
• Yao Qi
• Yu Yong
• Li Xiang
• Xu Chuanxiang
• Li Shaohui
• Li Shipei
• Liu Wenqu

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H10D86/451

  characterised by the compositions or shapes of the interlayer dielectrics · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60 Primary

  wherein the TFTs are in active matrices · CPC title

• G09G3/00

  Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes · CPC title