Sector sliding in shingled magnetic recording hard disk drive

US12548596B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12548596-B2
Application numberUS-202318528718-A
CountryUS
Kind codeB2
Filing dateDec 4, 2023
Priority dateDec 4, 2023
Publication dateFeb 10, 2026
Grant dateFeb 10, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Controlling a shingled magnetic recording (SMR) hard drive involves attempting a sequential write to a first sector of a sequence of sectors and, responsive to encountering a write inhibit boundary corresponding to the first sector, continuing the write to the next available sector in the sequence of sectors for the write. Thus, instead of that write inhibit triggering a hard error, the data is adaptively written to the next down-track physical sector possible, i.e., “sliding” to the next sector. This does not require an additional disk revolution thus there is negligible performance penalty. The write may be continued to the next track if necessary, and may continue through the entire zone, to maintain all the data in sequential form for performance and large block protection purposes.

First claim

Opening claim text (preview).

What is claimed is: 1 . A shingled magnetic recording (SMR) data storage device comprising an electronic controller comprising one or more sequences of instructions which, when executed by one or more processors, individually or in combination, cause performance of: attempting a sequential write to a first sector of a sequence of sectors of a recording disk; responsive to encountering a write inhibit boundary corresponding to the first sector, continuing the sequential write in a same disk revolution to the next available sector in the sequence of sectors for the sequential write; and dynamically adjusting the write inhibit boundary to inhibit writing of a sector within the sequence of sectors at a track misregistration that will increase a resultant track pitch of a track corresponding to the written sequence of sectors. 2 . The SMR data storage device of claim 1 , wherein the one or more sequences of instructions, when executed by the one or more processors, individually or in combination, cause further performance of: responsive to encountering the end of a first track, writing a track error correction parity sector at the end of the first track and continuing the sequential write to the next sector in the sequence of sectors at an adjacent second track. 3 . The SMR data storage device of claim 1 , wherein the sequence of sectors is being written to in an SMR zone of the recording disk, and wherein the one or more sequences of instructions, when executed by the one or more processors, individually or in combination, cause further performance of: adjusting the write inhibit boundary based on one or more of: remaining capacity in the SMR zone; storage capacity outside of the SMR zone for writing sectors that cannot be written in the SMR zone due to the write inhibit boundary; and operational vibration trends observed when writing in the SMR zone. 4 . The SMR data storage device of claim 1 , wherein the one or more sequences of instructions, when executed by the one or more processors, individually or in combination, cause further performance of: responsive to encountering the end of a zone of tracks for the sequential write, continuing the sequential write to spare memory capacity associated with the zone. 5 . The SMR data storage device of claim 4 , wherein the one or more sequences of instructions, when executed by the one or more processors, individually or in combination, cause further performance of: responsive to encountering no spare memory capacity associated with the zone, continuing the sequential write to spare memory elsewhere on the recording disk or to non-volatile memory elsewhere in the data storage device. 6 . A method of controlling a shingled magnetic recording (SMR) hard disk drive, the method comprising: attempting a sequential write to a first sector of a sequence of sectors of a recording disk; responsive to encountering a write inhibit boundary corresponding to the first sector, continuing the sequential write in a same disk revolution to the next available sector in the sequence of sectors for the sequential write; and responsive to encountering the end of a sector at the end of a first track, writing a track error correction parity sector at the end of the first track and continuing the sequential write to the next sector in the sequence of sectors at an adjacent second track. 7 . The method of claim 6 , further comprising: dynamically adjusting the write inhibit boundary to inhibit writing of a sector within the sequence of sectors at a track misregistration that will increase a resultant track pitch of a track corresponding to the written sequence of sectors. 8 . The method of claim 6 , wherein the sequence of sectors is being written to in an SMR zone of the recording disk, the method further comprising: adjusting the write inhibit boundary based on one or more of: remaining capacity in the SMR zone; storage capacity outside of the SMR zone for writing sectors that cannot be written in the SMR zone due to the write inhibit boundary; and operational vibration trends observed when writing in the SMR zone. 9 . The method of claim 6 , further comprising: responsive to encountering the end of a zone of tracks for the sequential write, continuing the sequential write to spare memory capacity associated with the zone. 10 . The method of claim 9 , further comprising: responsive to encountering no spare memory capacity associated with the zone, continuing the sequential write to spare memory elsewhere on the recording disk or to non-volatile memory elsewhere in the SMR hard disk drive. 11 . A controller circuitry storing or accessing one or more sequences of instructions which, when executed by one or more processors, individually or in combination, cause performance of: attempting a sequential write to a first sector of a sequence of sectors of a recording disk, wherein the sequence of sectors is being written to in an SMR zone of the recording disk; responsive to encountering a write inhibit boundary corresponding to the first sector, continuing the sequential write in a same disk revolution to the next available sector in the sequence of sectors for the sequential write; and adjusting the write inhibit boundary based on one or more of: remaining capacity in the SMR zone; storage capacity outside of the SMR zone for writing sectors that cannot be written in the SMR zone due to the write inhibit boundary; and operational vibration trends observed when writing in the SMR zone. 12 . The controller circuitry of claim 11 , wherein the one or more sequences of instructions, when executed by the one or more processors, individually or in combination, cause further performance of: dynamically adjusting the write inhibit boundary to inhibit writing of a sector within the sequence of sectors at a track misregistration that will increase a resultant track pitch of a track corresponding to the written sequence of sectors. 13 . The controller circuitry of claim 11 , wherein the one or more sequences of instructions, when executed by the one or more processors, individually or in combination, cause further performance of: responsive to encountering the end of a sector at the end of a first track, writing a track error correction parity sector at the end of the first track and continuing the sequential write to the next sector in the sequence of sectors at an adjacent second track. 14 . The controller circuitry of claim 11 , wherein the one or more sequences of instructions, when executed by the one or more processors, individually or in combination, cause further performance of: responsive to encountering the end of the SRM zone for the sequential write, continuing the sequential write to spare memory capacity associated with the zone. 15 . The controller circuitry of claim 14 , wherein the one or more sequences of instructions, when executed by the one or more processors, individually or in combination, cause further performance of: responsive to encountering no spare memory capacity associated with the zone, continuing the sequential write to spare memory elsewhere on the recording disk or to non-volatile memory elsewhere in a data storage device of which the controller circuitry is part. 16 . A data storage device comprising the controller circuitry of claim 11 , further comprising: a plurality of recording disk media rotatably mounted on a spindle; means for, under the control of the controller circuitry, writing to and reading from a first recording disk medium of the plurality of recording disk media;

Assignees

Inventors

Classifications

  • Aligning for runout, eccentricity or offset compensation (G11B5/5534, G11B5/59677, G11B5/59688 take precedence) · CPC title

  • track, i.e. the entire a spirally or concentrically arranged path on which the recording marks are located · CPC title

  • Recording on, or reproducing or erasing from, magnetic disks (G11B17/00, G11B19/00 take precedence) · CPC title

  • on discs · CPC title

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What does patent US12548596B2 cover?
Controlling a shingled magnetic recording (SMR) hard drive involves attempting a sequential write to a first sector of a sequence of sectors and, responsive to encountering a write inhibit boundary corresponding to the first sector, continuing the write to the next available sector in the sequence of sectors for the write. Thus, instead of that write inhibit triggering a hard error, the data is…
Who is the assignee on this patent?
Western Digital Tech Inc
What technology area does this patent fall under?
Primary CPC classification G11B5/59627. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 10 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).