Display apparatus and electronic apparatus including the same

US12548486B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12548486-B2
Application numberUS-202418967668-A
CountryUS
Kind codeB2
Filing dateDec 4, 2024
Priority dateDec 29, 2023
Publication dateFeb 10, 2026
Grant dateFeb 10, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display apparatus includes a data driver, a demux circuit, a wire mixing structure and a display panel. The data driver includes four output amplifiers. The demux circuit is connected to the four output amplifiers and branches the four output amplifiers into first, second, third, fourth, fifth, sixth, seventh, and eighth output lines through demux switching. The wire mixing structure is connected to the demux circuit, and has an input terminal and an output terminal. The display panel includes data lines connected to the wire mixing structure. When first data is provided to the input terminal of the wire mixing structure in an order of 1, 2, 3, 4, 5, 6, 7 and 8, second data at the output terminal of the wire mixing structure is output in an order of 4, 1, 2, 3, 7, 6, 5 and 8.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display apparatus comprising: a data driver including four output amplifiers; a demux circuit connected to the four output amplifiers and branching the four output amplifiers into first, second, third, fourth, fifth, sixth, seventh, and eighth output lines through demux switching; a wire mixing structure connected to the demux circuit, the wire mixing structure having an input terminal and an output terminal; and a display panel including data lines connected to the wire mixing structure, wherein first data being provided to the input terminal of the wire mixing structure in an order of 1, 2, 3, 4, 5, 6, 7 and 8 produces second data in an order of 4, 1, 2, 3, 7, 6, 5 and 8 at the output terminal of the wire mixing structure, wherein output data from the data driver comprise at least one of normal data that are directly applied to data lines of the display panel, and border reduction data that are applied to data lines of the display panel through border reduction lines, and wherein the first data having order numbers of 1, 2, 5 and 6 are the normal data and the first data having order numbers of 3, 4, 7 and 8 are the border reduction data. 2 . The display apparatus of claim 1 , further comprising a bending area disposed between the display panel and the data driver, wherein the demux circuit is disposed between an integrated circuit area of the data driver and the bending area. 3 . The display apparatus of claim 2 , wherein the bending area includes a bending line for folding elements toward a rear surface of the display panel, and wherein the display panel is disposed on a first side of the bending line and the demux circuit and the integrated circuit area are disposed on a second side of the bending line. 4 . The display apparatus of claim 1 , wherein the first, the fourth, the fifth and the eighth output lines of the demux circuit are activated by a first switching signal, and wherein the second, the third, the sixth and the seventh output lines of the demux circuit are activated by a second switching signal. 5 . The display apparatus of claim 1 , wherein the input terminal of the wire mixing structure includes first to eighth A pads that are sequentially disposed, and the output terminal of the wire mixing structure includes first to eighth B pads that are sequentially disposed, wherein the first A pad is connected to the second B pad, wherein the second A pad is connected to the third B pad, wherein the third A pad is connected to the fourth B pad, wherein the fourth A pad is connected to the first B pad, wherein the fifth A pad is connected to the seventh B pad, wherein the sixth A pad is connected to the sixth B pad, wherein the seventh A pad is connected to the fifth B pad, and wherein the eighth A pad is connected to the eighth B pad. 6 . The display apparatus of claim 1 , wherein the data driver further comprises an N+1-th output amplifier, an N+2-th output amplifier, an N+3-th output amplifier, an N+4-th output amplifier, an N+5-th output amplifier, an N+6-th output amplifier, an N+7-th output amplifier and an N+8-th output amplifier, wherein the N+1-th output amplifier is configured to output data of (N+1)A data line and data of (N+1)B data line, and wherein the N+2-th output amplifier is configured to output data of a dummy data line. 7 . The display apparatus of claim 6 , wherein the N+3-th output amplifier, the N+4-th output amplifier and the N+5-th output amplifier are inactive for a predefined period. 8 . The display apparatus of claim 7 , wherein the N+6-th output amplifier is configured to output data of (N+2)A data line and data of (N+2)B data line, wherein the N+7-th output amplifier is configured to output data of (N+3)A data line and data of (N+3)B data line, and wherein the N+8-th output amplifier is configured to output data of (N+ 4 )A data line and data of (N+4)B data line. 9 . The display apparatus of claim 1 , wherein the data driver further comprises an N+1-th output amplifier, an N+2-th output amplifier, an N+3-th output amplifier, an N+4-th output amplifier, an N+5-th output amplifier, an N+6-th output amplifier, an N+7-th output amplifier and an N+8-th output amplifier, wherein the N+5-th output amplifier is configured to output data of (N+1)A data line and data of (N+1)B data line, and wherein the N+2-th output amplifier is configured to output data of a dummy data line. 10 . The display apparatus of claim 9 , wherein the N+1-th output amplifier, the N+3-th output amplifier and the N+4-th output amplifier are inactive. 11 . The display apparatus of claim 10 , wherein the N+6-th output amplifier is configured to output data of (N+2)A data line and data of (N+2)B data line, wherein the N+7-th output amplifier is configured to output data of (N+3)A data line and data of (N+3)B data line, and wherein the N+8-th output amplifier is configured to output data of (N+4)A data line and data of (N+4)B data line. 12 . The display apparatus of claim 1 , wherein the display panel includes a first power applying line, a 1 A data line, a 1 B data line, a second power applying line, a third power applying line, a 2 B data line, a 2 A data line and a fourth power applying line which are sequentially disposed, wherein first color data are applied to the 1 A data line, wherein second color data are applied to the 1 B data line and the 2 B data line, and wherein third color data are applied to the 2 A data line. 13 . The display apparatus of claim 12 , wherein the display panel includes a first color first light emitting area, a second color first light emitting area, a third color first light emitting area, a second color second light emitting area, a third color second light emitting area, a second color third light emitting area, a first color second light emitting area and a second fourth light emitting area, wherein the 1 A data line is connected to the first color first light emitting area and the first color second light emitting area, wherein the 1 B data line is connected to the second color first light emitting area and the second color third light emitting area, wherein the 2 B data line is connected to the second color second light emitting area and the second color fourth light emitting area, and wherein the 2 A data line is connected to the third color first light emitting area. 14 . The display apparatus of claim 13 , wherein the third color second light emitting area is connected to a dummy data line. 15 . The display apparatus of claim 13 , wherein the second color first light emitting area and the second color second light emitting area are disposed in an 1-1 row, wherein the first color first light emitting area and the third color first light emitting area are disposed in an 1-2 row adjacent to the 1-1 row, wherein the second color third light emitting area and the second color fourth light emitting area are disposed in a 2-1 row adjacent to the 1-2 row, and wherein the third color second light emitting area and the first color second light emitting area are disposed in a 2-2 row adjacent to the 2-1 row. 16 . The display apparatus of claim 1 , wherein third data being provided to an input terminal of the demux circuit in an order of 1, 2, 3, 4, 5, 6, 7 and 8 produces fourth data at an output terminal of the demux circuit in an order of 1, 2, 4, 3, 5, 6, 8 and 7. 17 . An electronic apparatus comprising: a data driver including four output amplifiers; a demux circuit connected to the four output amplifiers and branchi

Assignees

Inventors

Classifications

  • Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns · CPC title

  • Details of output amplifiers or buffers arranged for use in a driving circuit · CPC title

  • Flexible displays · CPC title

  • Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters · CPC title

  • Interconnections, e.g. wiring lines or terminals · CPC title

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What does patent US12548486B2 cover?
A display apparatus includes a data driver, a demux circuit, a wire mixing structure and a display panel. The data driver includes four output amplifiers. The demux circuit is connected to the four output amplifiers and branches the four output amplifiers into first, second, third, fourth, fifth, sixth, seventh, and eighth output lines through demux switching. The wire mixing structure is conne…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3275. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 10 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).