Touch sensor, display device, display module, and electronic device

US12547266B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12547266-B2
Application numberUS-202519021977-A
CountryUS
Kind codeB2
Filing dateJan 15, 2025
Priority dateOct 21, 2016
Publication dateFeb 10, 2026
Grant dateFeb 10, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Sensing time of a touch sensor is shortened to increase responsiveness of touch sensing. A display device includes a gate driver, a plurality of touch sensors, and a plurality of touch wirings. The gate driver has a function of supplying a scan signal to the plurality of touch wirings at the same timing, and the touch sensors in different positions sense a plurality of touches at the same timing. In this manner, the responsiveness of touch sensing is increased. The gate driver has a function of controlling a scan signal for refreshing display and a scan signal used by the touch sensor for sensing.

First claim

Opening claim text (preview).

The invention claimed is: 1 . A semiconductor device comprising a gate driver, wherein the gate driver includes a decoder, a selection circuit, a first buffer, a second buffer, and a third buffer, wherein the selection circuit is electrically connected to a first input signal line, wherein the selection circuit comprises a shift register, a first switch, a second switch, and a third switch, wherein a second terminal of the first switch is electrically connected to a first scan line through the first buffer, wherein a second terminal of the second switch is electrically connected to a second scan line through the second buffer, wherein a second terminal of the third switch is electrically connected to a touch wiring through the third buffer, wherein the decoder is electrically connected to the first input signal line, a second input signal line, and an output signal line, wherein the output signal line is electrically connected to an input terminal of the shift register and to a first terminal of the third switch, wherein a first output terminal of the shift register is electrically connected to a first terminal of the first switch, wherein a second output terminal of the shift register is electrically connected to a first terminal of the second switch, wherein a third terminal of the first switch and a third terminal of the second switch are electrically connected to a wiring to which a first potential is input, wherein a third terminal of the third switch is electrically connected to a common wiring, wherein a first signal generated from a signal of the second input signal line is output to the output signal line, wherein when a potential of the second input signal line is L, the first terminal of the first switch and the second terminal of the first switch are electrically connected to each other, the first terminal of the second switch and the second terminal of the second switch are electrically connected to each other, and the second terminal of the third switch and the third terminal of the third switch are electrically connected to each other, and wherein when the potential of the second input signal line is H, the second terminal of the first switch and the third terminal of the first switch are electrically connected to each other, the second terminal of the second switch and the third terminal of the second switch are electrically connected to each other, and the first terminal of the third switch and the second terminal of the third switch are electrically connected to each other. 2 . The semiconductor device according to claim 1 , further comprising a fourth switch and a fourth buffer, wherein a first terminal of the fourth switch is electrically connected to a third output terminal of the shift register, a second terminal of the fourth switch is electrically connected to a third scan line through the fourth buffer, and a third terminal of the fourth switch is electrically connected to the wiring to which the first potential is input. 3 . The semiconductor device according to claim 1 , further comprising a pixel, wherein the pixel comprises a first display element, and wherein the first display element is a transmissive liquid crystal element. 4 . The semiconductor device according to claim 3 , wherein the pixel comprises the first display element and a second display element, wherein the first display element is configured to reflect visible light, and wherein the second display element is configured to emit visible light. 5 . The semiconductor device according to claim 4 , wherein the second display element is a light-emitting element. 6 . A semiconductor device comprising a gate driver, wherein the gate driver includes a decoder, a selection circuit, a first buffer, and a third buffer, wherein the selection circuit is electrically connected to a first input signal line, wherein the selection circuit comprises a shift register, a first switch, and a third switch, wherein a second terminal of the first switch is electrically connected to a first scan line through the first buffer, wherein a second terminal of the third switch is electrically connected to a touch wiring through the third buffer, wherein the decoder is electrically connected to the first input signal line, a second input signal line, and an output signal line, wherein the output signal line is electrically connected to an input terminal of the shift register and to a first terminal of the third switch, wherein a first output terminal of the shift register is electrically connected to a first terminal of the first switch, wherein a third terminal of the first switch is electrically connected to a wiring to which a first potential is input, wherein a third terminal of the third switch is electrically connected to a common wiring, wherein a first signal generated from a signal of the second input signal line is output to the output signal line, wherein when a potential of the second input signal line is L, the first terminal of the first switch and the second terminal of the first switch are electrically connected to each other and the second terminal of the third switch and the third terminal of the third switch are electrically connected to each other, and wherein when the potential of the second input signal line is H, the second terminal of the first switch and the third terminal of the first switch are electrically connected to each other and the first terminal of the third switch and the second terminal of the third switch are electrically connected to each other. 7 . The semiconductor device according to claim 6 , further comprising a pixel, wherein the pixel comprises a first display element, and wherein the first display element is a transmissive liquid crystal element. 8 . The semiconductor device according to claim 7 , wherein the pixel comprises the first display element and a second display element, wherein the first display element is configured to reflect visible light, and wherein the second display element is configured to emit visible light. 9 . The semiconductor device according to claim 8 , wherein the second display element is a light-emitting element.

Assignees

Inventors

Classifications

  • using sets of wires, e.g. crossed wires · CPC title

  • using resistive elements, e.g. a single continuous surface or two parallel surfaces put in contact · CPC title

  • Input devices, e.g. touch panels · CPC title

  • comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

  • wherein the TFTs are in active matrices · CPC title

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What does patent US12547266B2 cover?
Sensing time of a touch sensor is shortened to increase responsiveness of touch sensing. A display device includes a gate driver, a plurality of touch sensors, and a plurality of touch wirings. The gate driver has a function of supplying a scan signal to the plurality of touch wirings at the same timing, and the touch sensors in different positions sense a plurality of touches at the same timin…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification G06F3/0412. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 10 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).