Array substrate and display device

US12547265B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12547265-B2
Application numberUS-202418932441-A
CountryUS
Kind codeB2
Filing dateOct 30, 2024
Priority dateSep 1, 2021
Publication dateFeb 10, 2026
Grant dateFeb 10, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides an array substrate and a display device. The array substrate includes: a plurality of gate lines extending in a first direction, and a plurality of data lines extending in a second direction and crossing the gate lines to define a plurality of sub-pixels; a plurality of touch signal lines extending in the second direction and arranged in light shielding regions of the sub-pixels; a plurality of touch electrodes insulated from each other; and a plurality of metal pattern units corresponding to the sub-pixels respectively and arranged in the light shielding region of each sub-pixel. The metal pattern unit includes a first metal strip arranged on at least one side of the data line and extending in the second direction.

First claim

Opening claim text (preview).

What is claimed is: 1 . An array substrate, comprising a base substrate, and a plurality of gate lines extending in a first direction and a plurality of data lines extending in a second direction arranged on the base substrate, wherein each gate line crosses the plurality of data lines to define a plurality of sub-pixels, wherein the array substrate further comprises: a plurality of touch signal lines extending in the second direction and arranged in light shielding regions of the sub-pixels; a plurality of touch electrodes insulated from each other and each coupled to at least one touch signal line; and a plurality of metal pattern units corresponding to the sub-pixels respectively and each arranged in the light shielding region of the corresponding sub-pixel, wherein the metal pattern unit comprises a first metal strip arranged on at least one side of the data line and extending in the second direction, an overlapping area between an orthogonal projection of the first metal strip onto the base substrate and an orthogonal projection of the touch signal line onto the base substrate is A, and a ratio of the overlapping area A to an area of the orthogonal projection of the touch signal line onto the base substrate is greater than a threshold; wherein the orthogonal projection of the first metal strip onto the base substrate does not overlap an orthogonal projection of the data line onto the base substrate; wherein in a direction parallel to the base substrate and perpendicular to the second direction, a minimum distance between a boundary of the orthogonal projection of the first metal strip onto the base substrate and a boundary of the orthogonal projection of the data line onto the base substrate is 2.1 μm to 8 μm. 2 . The array substrate according to claim 1 , wherein in a direction parallel to the base substrate and perpendicular to the second direction, a size of the touch signal line is less than a size of the first metal strip. 3 . The array substrate according to claim 2 , wherein in the direction parallel to the base substrate and perpendicular to the second direction, at least one boundary of the orthogonal projection of the first metal strip onto the base substrate exceeds a boundary of the orthogonal projection of the touch signal line onto the base substrate by 0.8 μm to 2.0 μm. 4 . The array substrate according to claim 3 , wherein the touch signal line is provided with a center line extending in the second direction, the first metal strip is provided with a center line extending in the second direction, and an orthogonal projection of the center line of the touch signal line onto the base substrate coincides with an orthogonal projection of the center line of the first metal strip onto the base substrate. 5 . The array substrate according to claim 1 , wherein the metal pattern unit further comprises a second metal strip, and the second metal strip comprises a first metal sub-line arranged on at least one side of the gate line and extending in the first direction, and a second metal sub-line arranged on at least one side of the data line and extending in the second direction, wherein the first metal sub-line is coupled to the second metal sub-line, and the second metal sub-line and the first metal strip are arranged at two opposite sides of the sub-pixel respectively. 6 . The array substrate according to claim 5 , wherein the first metal strip is arranged at a same layer as the second metal strip, a first notch is formed between the first metal strip and the second metal strip of a same metal pattern unit in the second direction, and a second notch is formed between two first metal sub-lines of different metal pattern units in the first direction. 7 . The array substrate according to claim 6 , wherein each touch electrode comprises a plurality of touch sub-electrodes, and an orthogonal projection of the touch sub-electrode onto the base substrate does not overlap an orthogonal projection of the gate line onto the base substrate and an orthogonal projection of the data line onto the base substrate; in a same touch electrode, the first metal sub-lines in the plurality of metal pattern units are coupled to each other through a first bridging portion arranged at a same layer as or a different layer from the first metal strip at the second notch, and at least one metal pattern unit is coupled to at least one touch sub-electrode in the touch electrode; in different touch electrodes, the first metal sub-lines between the plurality of metal pattern units are not coupled to each other at the second notch; in the same touch electrode, the first metal strip and the second metal strip in each of the metal pattern units in at least one column in the second direction are coupled to each other through a second bridging portion arranged at a same layer as or a different layer from the first metal strip at the first notch, and the first metal strip is coupled to a corresponding touch signal line; and the metal pattern units are not coupled to each other between the adjacent touch electrodes in the second direction. 8 . The array substrate according to claim 7 , wherein in the same touch electrode, each first metal strip in the first metal strips in at least one column in the second direction is coupled to the corresponding touch signal line, and all first metal strips corresponding to the touch electrode are not coupled to the touch signal lines not corresponding to the touch electrode so that the metal pattern units are not coupled to each other between the adjacent touch electrodes in the second direction; or in the same touch electrode, the first metal strips in at least two columns in the second direction are coupled to different touch signal lines, and the first metal strip coupled to the touch signal line not corresponding to the touch electrode is not coupled to the second metal strip in the touch electrode at the first notch so that the metal pattern units are not coupled to each other between the adjacent touch electrodes in the second direction. 9 . The array substrate according to claim 5 , wherein in two adjacent metal pattern units in the first direction, the first metal strip in one metal pattern unit and the second metal sub-line in the other metal pattern unit are arranged at two opposite sides of a same data line, and in a direction parallel to the base substrate and perpendicular to the second direction, a distance between a boundary of an orthogonal projection of the first metal strip onto the base substrate and a boundary of the orthogonal projection of the data line onto the base substrate is the same as a distance between a boundary of an orthogonal projection of the second metal sub-line onto the base substrate and the boundary of the orthogonal projection of the data line onto the base substrate. 10 . The array substrate according to claim 7 , further comprising a pixel electrode and a common electrode arranged in each sub-pixel, wherein the touch sub-electrode serves as the common electrode. 11 . The array substrate according to claim 10 , wherein in the direction parallel to the base substrate and perpendicular to the second direction, a distance between a boundary of the orthogonal projection of the data line onto the base substrate and a boundary of an orthogonal projection of the pixel electrode in one sub-pixel adjacent to the data line onto the base substrate is the same as a distance between the boundary of the orthogonal projection of the data line onto the base substrate and a boundary of an orthogonal projection the pixel electrode in the other sub-pixel adjacent to the data line onto the base substrate, and a distance between the boundary of the orthogona

Assignees

Inventors

Classifications

  • protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title

  • having light shields · CPC title

  • Cross over in capacitive digitiser, i.e. details of structures for connecting electrodes of the sensing pattern where the connections cross each other, e.g. bridge structures comprising an insulating layer, or vias through substrate · CPC title

  • Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds · CPC title

  • using a single layer of sensing electrodes · CPC title

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What does patent US12547265B2 cover?
The present disclosure provides an array substrate and a display device. The array substrate includes: a plurality of gate lines extending in a first direction, and a plurality of data lines extending in a second direction and crossing the gate lines to define a plurality of sub-pixels; a plurality of touch signal lines extending in the second direction and arranged in light shielding regions o…
Who is the assignee on this patent?
Beijing Boe Display Tech Co, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/04164. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 10 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).