System and method for supporting multi-path and/or multi-mode NMVe over fabrics devices

US12541477B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12541477-B2
Application numberUS-202318106477-A
CountryUS
Kind codeB2
Filing dateFeb 6, 2023
Priority dateJul 26, 2016
Publication dateFeb 3, 2026
Grant dateFeb 3, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A system includes a fabric switch including a motherboard, a baseboard management controller (BMC), a network switch configured to transport network signals, and a PCIe switch configured to transport PCIe signals; a midplane; and a plurality of device ports. Each of the plurality of device ports is configured to connect a storage device to the motherboard of the fabric switch over the midplane and carry the network signals and the PCIe signals over the midplane. The storage device is configurable in multiple modes based a protocol established over a fabric connection between the system and the storage device.

First claim

Opening claim text (preview).

What is claimed is: 1 . A device comprising: a multi-protocol connector configured to connect to an apparatus, wherein the multi-protocol connector comprises a pin to transport a first type of physical signal; wherein the device is removably connected to the apparatus; wherein the device transports a second type of physical signal to the apparatus using a first signal path; wherein the device transports a third type of physical signal to the apparatus using a second signal path; wherein the third type of physical signal comprises an Ethernet signal; wherein the pin of the multi-protocol connector is connected to an Ethernet interface to transport the Ethernet signal; and wherein the device is configured to use a first protocol with the second type of physical signal and a second protocol with the Ethernet signal. 2 . The device of claim 1 , wherein the device provides device information to the apparatus using the first signal path. 3 . The device of claim 1 , wherein the first protocol comprises a first non-volatile memory protocol and the second protocol comprises a second non-volatile memory protocol. 4 . The device of claim 1 , wherein the device is operable in a first port mode or a second port mode. 5 . The device of claim 1 , wherein the pin comprises a Serial Attached Small Computer System Interface (SCSI) (SAS) pin of the multi-protocol connector. 6 . The device of claim 1 , further comprising: an interconnect interface configured to transmit the second type of physical signal. 7 . The device of claim 1 , wherein the third type of physical signal provides a service associated with code for the device. 8 . The device of claim 1 , further comprising a switch configured to switch the third type of physical signal to the first signal path. 9 . A system comprising: a first board; and a second board; wherein the second board is configured to connect a storage device to the first board using a multi-protocol connector having a pin to transport a first type of physical signal; wherein the second board is configured to transmit a second type of physical signal between the storage device and the first board using a first protocol and transmit a third type of physical signal between the storage device and the first board using a second protocol; wherein the third type of signal comprises an Ethernet signal; and wherein the pin of the multi-protocol connector is connected to an Ethernet interface to transport the Ethernet signal. 10 . The system of claim 9 , further comprising a switch configured to transmit the Ethernet signal between the first board and the storage device. 11 . The system of claim 9 , wherein the first protocol comprises a first non-volatile memory protocol and the second protocol comprises a second non-volatile memory protocol. 12 . The system of claim 9 , wherein the second board is configured to communicate with the storage device in a first port mode or a second port mode. 13 . The system of claim 9 , wherein the storage device is operable in a first port mode or a second port mode. 14 . The system of claim 9 , wherein: the first board comprises the Ethernet interface; and the second board is configured to transmit the Ethernet signal between the Ethernet interface and the storage device. 15 . The system of claim 9 , wherein the Ethernet signal provides a service associated with code for the storage device. 16 . The system of claim 9 , further comprising a switch configured to switch the third type of physical signal and the second type of physical signal. 17 . A device comprising: a multi-protocol connector configured to removably connect the device to an apparatus, wherein the multi-protocol connector comprises a pin to transport a first type of physical signal; wherein the device transports, using a first protocol, a second type of physical signal to the apparatus using a first signal path; wherein the device transports, using a second protocol, a third type of physical signal to the apparatus using a second signal path; wherein the third type of physical signal comprises an Ethernet signal; and wherein the pin of the multi-protocol connector is connected to an Ethernet interface to transport the Ethernet signal. 18 . The device of claim 17 , further comprising a network interface configured to connect the device to the first signal path. 19 . The device of claim 17 , wherein the device is operable in a first port mode or a second port mode.

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What does patent US12541477B2 cover?
A system includes a fabric switch including a motherboard, a baseboard management controller (BMC), a network switch configured to transport network signals, and a PCIe switch configured to transport PCIe signals; a midplane; and a plurality of device ports. Each of the plurality of device ports is configured to connect a storage device to the motherboard of the fabric switch over the midplane …
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F13/4022. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 03 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).