Device cache engine for a cache-coherent interconnect memory expansion

Patent metadata

Field	Value
Publication number	US-12541326-B2
Application number	US-202318515218-A
Country	US
Kind code	B2
Filing date	Nov 20, 2023
Priority date	Mar 16, 2023
Publication date	Feb 3, 2026
Grant date	Feb 3, 2026

Abstract

A memory device is disclosed. The memory device may include an interface to connect the memory device to a processor, a first storage for a data, and a second storage for the data. A controller may process a request received from the processor via the interface using the first storage or the second storage. A policy engine may instruct the controller regarding a storing of the data in the first storage or the second storage.

First claim

What is claimed is:

1 . A memory device, comprising:
an interface to connect the memory device to a processor; a first storage for a data; a second storage for the data; a controller to process a request received from the processor via the interface using the first storage or the second storage; and a policy engine to instruct the controller regarding a storing of the data in the first storage or the second storage.

2 . The memory device according to claim 1 , further comprising:
a command queue for the policy engine to send a command to the controller; and a response queue for the policy engine to receive a response to the command from the controller.

3 . The memory device according to claim 1 , further comprising a queue for the controller to inform the policy engine regarding the data stored in the first storage.

4 . The memory device according to claim 3 , wherein the controller is configured to send information about the request from the processor to the policy engine using the queue.

5 . The memory device according to claim 1 , wherein the policy engine is configured to instruct the controller regarding the storing of the data in the first storage and the second storage based at least in part on an application using the data.

6 . The memory device according to claim 1 , further comprising a connector configured to receive a device including the policy engine.

7 . The memory device according to claim 1 , wherein:
the policy engine includes a second processor and software running on the second processor; and the memory device is configured to support update of the software running on the second processor.

8 . A method, comprising:
sending a command from a policy engine to a controller in a memory device, the command relating to storing a data in a first storage of the memory device or a second storage of the memory device; and receiving a response at the policy engine from the controller in the memory device, the response based at least in part on the command, wherein the policy engine is pluggable.

9 . The method according to claim 8 , wherein sending the command from the policy engine to the controller in the memory device includes:
selecting the data in the second storage of the memory device for prefetch by a policy engine; and sending a prefetch command for the data in the second storage of the memory device from the prefetch engine to the controller in the memory device.

10 . The method according to claim 8 , wherein sending the command from the policy engine to the controller in the memory device includes sending an evict command for the data in the first storage of the memory device from a prefetch engine to the controller in the memory device.

11 . The method according to claim 8 , wherein sending the command from the policy engine to the controller in the memory device includes sending a temperature command for the data from a prefetch engine to the controller in the memory device.

12 . The method according to claim 8 , wherein sending the command from the policy engine to the controller in the memory device includes sending a status command from the policy engine to the controller in the memory device.

13 . The method according to claim 8 , further comprising receiving, from the controller in the memory device, information about a request received by the controller in the memory device from a processor.

14 . A method, comprising:
receiving a request from a processor at a controller of a memory device; processing the request using a first storage of the memory device or a second storage of the device; and sending information about the request to a policy engine that issues instructions regarding a storing of a data in the first storage or the second storage, wherein the policy engine is pluggable.

15 . The method according to claim 14 , wherein the information about the request includes an address for the data in the first storage, a size of the data in the first storage, a clean/dirty status for the data in the first storage, a temperature of the data in the first storage, a last access for the data in the first storage, an access count for the data in the first storage, an access frequency for the data in the first storage, or a host-supplied metadata associated with the data in the first storage.

16 . The method according to claim 14 , further comprising:
receiving a command from the policy engine at the controller of the memory device, the command relating to storing a data in the first storage of the memory device or the second storage of the memory device; and processing the command by the controller of the memory device using the first storage of the memory device or the second storage of the memory device.

17 . The method according to claim 16 , wherein:
receiving the command from the policy engine at the controller of the memory device includes receiving a prefetch command for a data from the policy engine at the controller of the memory device; and processing the command by the controller of the memory device using the first storage of the memory device or the second storage of the memory device includes prefetching the data from the second storage of the memory device into the first storage of the memory device.

18 . The method according to claim 16 , wherein:
receiving the command from the policy engine at the controller of the memory device includes receiving an evict command for a data from the policy engine at the controller of the memory device; and processing the command by the controller of the memory device using the first storage of the memory device or the second storage of the memory device includes evicting the data from the first storage of the memory device.

19 . The method according to claim 16 , wherein:
receiving the command from the policy engine at the controller of the memory device includes receiving a temperature command for a data from the policy engine at the controller of the memory device, the temperature command including a temperature for the data; and processing the command by the controller of the memory device using the first storage of the memory device or the second storage of the memory device includes updating a metadata for the data in the first storage of the memory device by the controller to store the temperature for the data.

20 . The method according to claim 16 , wherein:
receiving the command from the policy engine at the controller of the memory device includes receiving a status command for a data from the policy engine at the controller of the memory device; and processing the command by the controller of the memory device using the first storage of the memory device or the second storage of the memory device includes returning a status of the data in the first storage.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kachare Ramdas P
• Lau Jimmy
• Soltaniyeh Mohammadreza
• Beygi Amir
• Lac Tinh
• Subbanna Divya
• Aghaee Mostafa
• Zhao Dongwan
• Tien William
• Sinai Kakodkar Varadraj Ninad
• Cargnini Luis Vitorio

Classifications

• G06F3/0673

  Single storage device · CPC title

• G06F3/0611 Primary

  in relation to response time · CPC title

• G06F3/0659 Primary

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F3/061

  Improving I/O performance · CPC title

• G06F13/1694

  Configuration of memory controller to different memory types · CPC title