Wiring substrates and electronic apparatuses

Patent metadata

Field	Value
Publication number	US-12538413-B2
Application number	US-202218029621-A
Country	US
Kind code	B2
Filing date	May 23, 2022
Priority date	May 23, 2022
Publication date	Jan 27, 2026
Grant date	Jan 27, 2026

Abstract

The present disclosure provides a wiring substrate and an electronic apparatus. The wiring substrate includes a substrate and a shielding signal line disposed on the substrate. The substrate includes a functional region; the functional region is provided with a plurality of pad groups; the plurality of pad groups are distributed in an array along a first direction and a second direction respectively, and the second direction intersects with the first direction. The shielding signal line includes a first portion surrounding all pad groups and second portions connected with the first portion, and the second portions are located between two adjacent pad groups along the second direction. The electronic apparatus includes the wiring substrate and an electronic element connected with the pad groups.

First claim

The invention claimed is:

1 . A wiring substrate, comprising a substrate, and a shielding signal line disposed on the substrate; wherein,
the substrate comprises a functional region; the functional region is provided with a plurality of pad groups; the plurality of pad groups are distributed in an array along a first direction and a second direction respectively, and the second direction intersects with the first direction; and the shielding signal line comprises a first portion surrounding all the pad groups and second portions protruding from the first portion in the first direction, wherein the second portions each are located between two adjacent pad groups along the second direction, wherein the wiring substrate further comprises a bonding region at a side of the functional region, and the second portions each are located between two pad groups adjacent to each other along the second direction and farthest from the bonding region in a plurality of pad groups arranged along the first direction, and wherein in the second direction, at least a part of each of the second portions overlaps with the two pad groups; and a distance, in the first direction, from an edge of the second portions facing toward the bonding region in the first direction to the bonding region is greater than a distance, in the first direction, from a side of each of the two pad groups close to the bonding region in the first direction to the bonding region.

2 . The wiring substrate of claim 1 , wherein the first portion and the second portions are formed into an integral structure.

3 . The wiring substrate of claim 1 , wherein a line width of the first portion is less than a size of the second portions along the first direction.

4 . The wiring substrate of claim 1 , further comprising an insulation layer located at a side of the shielding signal line away from the substrate, wherein the insulation layer is provided with a plurality of first holes, and an orthographic projection of one second portion on the substrate covers an orthographic projection of at least one first hole on the substrate.

5 . The wiring substrate of claim 4 , wherein the orthographic projection of one second portion on the substrate covers an orthographic projection of at least two first holes on the substrate, and the at least two first holes are arranged in a spacing along the first direction.

6 . The wiring substrate of claim 4 , wherein each of the pad groups comprises at least two sub-pads; the insulation layer is further provided with a plurality of second holes, and one second hole exposes one sub-pad; a total area of the first holes corresponding to one second portion is greater than a total area of the second holes corresponding to one pad group adjacent to the second portion.

7 . The wiring substrate of claim 4 , wherein the insulation layer comprises an inorganic layer.

8 . The wiring substrate of claim 4 , further comprising a reflective material layer located at a side of the insulation layer away from the substrate, wherein the reflective material layer covers the first holes.

9 . The wiring substrate of claim 1 , wherein the shielding signal line further comprises third portions connected with the first portion;
the third portions are disposed at a side, not adjacent to other pad groups along the second direction, of the pad groups at corners of the functional region.

10 . The wiring substrate of claim 9 , wherein the first portion and the third portions are formed into an integral structure.

11 . The wiring substrate of claim 9 , wherein a line width of the first portion is less than a size of the third portions along the first direction; and/or, a size of the third portions along the second direction is less than a size of the second portions along the second direction.

12 . The wiring substrate of claim 9 , further comprising an insulation layer located at a side of the shielding signal line away from the substrate, wherein the insulation layer is provided with a plurality of first holes, and an orthographic projection of one third portion on the substrate covers an orthographic projection of at least one first hole on the substrate.

13 . The wiring substrate of claim 12 , wherein the orthographic projection of one third portion on the substrate covers an orthographic projection of at least two first holes on the substrate; and the at least two first holes are arranged in a spacing along the first direction.

14 . The wiring substrate of claim 12 , wherein each of the pad groups comprises at least two sub-pads; and the insulation layer is further provided with a plurality of second holes, and one second hole exposes one sub-pad;
a total area of the first holes corresponding to one third portion is greater than a total area of the second holes corresponding to one pad group adjacent to the third portion.

15 . The wiring substrate of claim 14 , wherein, in a plurality of second holes corresponding to pad groups farthest from the bonding region in the plurality of pad groups arranged along the first direction, a distance from the second hole closest to the bonding region to the bonding region is a first distance, the distance from the edge of the second portions facing toward the bonding region in the first direction to the bonding region is a second distance, and a distance from an edge of the third portions facing toward the bonding region to the bonding region is a third distance;
the second distance is greater than or equal to the first distance; and/or the third distance is greater than or equal to the first distance.

16 . The wiring substrate of claim 9 , further comprising a plurality of signal lines disposed on the substrate; wherein,
in the plurality of signal lines, at least one signal line is located at a side of the second portions facing toward the bonding region; along the first direction, a distance between the second portions and the at least one signal line at the side of the second portions facing toward the bonding region is greater than or equal to 200 microns; and/or, in the plurality of signal lines, at least one signal line is located at a side of the third portions facing toward the bonding region; along the first direction, a distance between the third portions and the at least one signal line at the side of the third portions facing toward the bonding region is greater than or equal to 200 microns.

17 . The wiring substrate of claim 9 , wherein each of the pad groups comprises a plurality of sub-pads, the wiring substrate further comprises connection wires, and at least two sub-pads in a same pad group are connected by the connection wire; along the second direction, a minimum distance between the second portions and the adjacent connection wires is greater than or equal to 200 microns; and/or, along the second direction, a minimum distance between the third portions and the adjacent connection wires is greater than or equal to 200 microns.

18 . The wiring substrate of claim 1 , wherein each of the pad groups comprises a plurality of sub-pads, and the plurality of sub-pads and the shielding signal line are disposed in a same layer.

19 . The wiring substrate of claim 1 , wherein each of the pad groups comprises a plurality of first sub-pad groups and one second sub-pad group, the plurality of first sub-pad groups are electrically connected with each other in series by a connection wire, at least one sub-pad of the second sub-pad group is connected to one sub-pad of a corresponding first sub-pad group of the plurality of f

Assignees

• Hefei Boe Ruisheng Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Xu Jiawei
• Xu Zouming
• Wu Xintao
• Ma Yajun

Classifications

• H05K1/18

  structurally associated with non-printed electric components (H05K1/16 takes precedence) · CPC title

• H05K1/11

  Printed elements for providing electric connections to or between printed circuits · CPC title

• H05K1/0224

  Patterned shielding planes, ground planes or power planes (H05K1/0253 takes precedence) · CPC title

• H01L25/167

  Electricity · mapped topic

• H05K1/111

  Pads for surface mounting, e.g. lay-out · CPC title