Amplifier and method for controlling common mode voltage of the same

Patent metadata

Field	Value
Publication number	US-12537490-B2
Application number	US-202318154822-A
Country	US
Kind code	B2
Filing date	Jan 14, 2023
Priority date	Jan 28, 2022
Publication date	Jan 27, 2026
Grant date	Jan 27, 2026

Abstract

The present application discloses an amplifier and a method for controlling a common mode voltage thereof. The method includes: generating a control signal according to a positive-terminal input signal, a negative-terminal input signal and a target common mode voltage; and coupling the controlling signal to a first terminal of a positive-terminal capacitor and a first terminal of a negative-terminal capacitor, to adjust degree of conduction of a positive-terminal p-type transistor and degree of conduction of a negative-terminal p-type transistor, or to adjust degree of conduction of a positive-terminal n-type transistor and degree of conduction of a negative-terminal n-type transistor, thereby changing a common mode voltage.

First claim

What is claimed is:

1 . An amplifier, comprising:
a positive-terminal p-type transistor; a negative-terminal p-type transistor; a positive-terminal n-type transistor, wherein the positive-terminal p-type transistor and the positive-terminal n-type transistor are stacked between a first reference voltage and a second reference voltage, a drain of the positive-terminal n-type transistor is coupled to a drain of the positive-terminal p-type transistor and outputs a positive-terminal output signal; a negative-terminal n-type transistor, wherein the negative-terminal p-type transistor and the negative-terminal n-type transistor are stacked between the first reference voltage and the second reference voltage, and a drain of the negative-terminal n-type transistor is coupled to a drain of the negative-terminal p-type transistor and outputs a negative-terminal output signal; a first positive-terminal capacitor, coupled between a gate of the positive-terminal p-type transistor and a gate of the positive-terminal n-type transistor; a first negative-terminal capacitor, coupled between a gate of the negative-terminal p-type transistor and a gate of the negative-terminal n-type transistor; and a first control circuit, configured to generate a first control signal to a first terminal of the first positive-terminal capacitor and a first terminal of the first negative-terminal capacitor according to the positive-terminal output signal, the negative-terminal output signal and a target common mode voltage, wherein a positive-terminal input signal of the amplifier is input from a second terminal of the first positive-terminal capacitor, and a negative-terminal input signal of the amplifier is input from a second terminal of the first negative-terminal capacitor.

2 . The amplifier of claim 1 , wherein the amplifier is a continuous time amplifier, and the amplifier further comprises a positive-terminal resistor and negative-terminal resistor, wherein the first control signal reaches the first terminal of the first positive-terminal capacitor through the positive-terminal resistor, and the first control signal reaches the first terminal of the first negative-terminal capacitor through the negative-terminal resistor.

3 . The amplifier of claim 1 , wherein the amplifier is a discrete time amplifier, and the amplifier further comprises a first switch and a second switch, wherein the first control signal reaches the first terminal of the first positive-terminal capacitor through the first switch, and the first control signal reaches the first terminal of the first negative-terminal capacitor through the second switch.

4 . The amplifier of claim 1 , further comprising:
a second positive-terminal capacitor, serially connected between a gate of the positive-terminal p-type transistor and a gate of the positive-terminal n-type transistor with the first positive-terminal capacitor, wherein a second terminal of the second positive-terminal capacitor is coupled to the second terminal of the first positive-terminal capacitor; and a second negative-terminal capacitor, serially connected between a gate of the negative-terminal p-type transistor and a gate of the negative-terminal n-type transistor with the first negative-terminal capacitor, wherein a second terminal of the second negative-terminal capacitor is coupled to the second terminal of the first negative-terminal capacitor.

5 . The amplifier of claim 4 , wherein a second control signal is further generated to a first terminal of the second positive-terminal capacitor and a first terminal of the second negative-terminal capacitor.

6 . The amplifier of claim 4 , further comprising a second control circuit, configured to generate a second control signal to a first terminal of the second positive-terminal capacitor and a first terminal of the second negative-terminal capacitor according to the positive-terminal output signal, the negative-terminal output signal and the target common mode voltage.

7 . The amplifier of claim 1 , wherein the first control circuit compares a common mode voltage of the positive-terminal output signal and the negative-terminal output signal with the target common mode voltage to generate the first control signal.

8 . The amplifier of claim 1 , wherein the first control circuit performs integration on a difference between the common mode voltage of the positive-terminal output signal and the negative-terminal output signal and the target common mode voltage to generate the first control signal.

9 . The amplifier of claim 1 , further comprising:
a third control circuit, configured to generate a third control signal according to the positive-terminal output signal, the negative-terminal output signal and the target common mode voltage; and a current source, configured to adjust the level of an output current according to the third control signal.

10 . The amplifier of claim 1 , further comprising a current source, wherein the current source outputs a fixed current.

11 . A method for controlling a common mode voltage of an amplifier, wherein the amplifier comprises:
a positive-terminal p-type transistor; a negative-terminal p-type transistor; a positive-terminal n-type transistor, wherein the positive-terminal p-type transistor and the positive-terminal n-type transistor are stacked between a first reference voltage and a second reference voltage, a drain of the positive-terminal n-type transistor is coupled to a drain of the positive-terminal p-type transistor and outputs a positive-terminal output signal; a negative-terminal n-type transistor, wherein the negative-terminal p-type transistor and the negative-terminal n-type transistor are stacked between the first reference voltage and the second reference voltage, and a drain of the negative-terminal n-type transistor is coupled to a drain of the negative-terminal p-type transistor and outputs a negative-terminal output signal; a first positive-terminal capacitor, coupled between a gate of the positive-terminal p-type transistor and a gate of the positive-terminal n-type transistor; a first negative-terminal capacitor, coupled between a gate of the negative-terminal p-type transistor and a gate of the negative-terminal n-type transistor; and wherein a positive-terminal input signal of the amplifier is input from a second terminal of the first positive-terminal capacitor, and a negative-terminal input signal of the amplifier is input from a second terminal of the first negative-terminal capacitor; and the method comprises: generating a first control signal according to according to the positive-terminal output signal, the negative-terminal output signal and a target common mode voltage; and coupling the controlling signal to a first terminal of the first positive-terminal capacitor and a first terminal of the first negative-terminal capacitor, so as to adjust degree of conduction of the positive-terminal p-type transistor and degree of conduction of the negative-terminal p-type transistor, or to adjust degree of conduction of the positive-terminal n-type transistor and degree of conduction of the negative-terminal n-type transistor, thereby changing a common mode voltage of the positive-terminal output signal and the negative-terminal output signal.

12 . The method of claim 11 , wherein the amplifier is a continuous time amplifier, and the amplifier further comprises a positive-terminal resistor and a negative-terminal resistor, wherein the first control signal reaches the first terminal of the first positive-terminal capacitor through the positive-terminal resistor, and the first control signal reaches the first terminal of the first negative-t

Assignees

• Realtek Semiconductor Corp

Inventors

• Huang Shih-Hsiung
• Hong Wei-Cian

Classifications

• H03F3/45632

  in differential amplifiers with FET transistors as the active amplifying circuit (H03F3/4578 takes precedence) · CPC title

• H03F1/226

  with junction-FET's · CPC title

• H03F3/45385 Primary

  Non-folded cascode stages · CPC title

• H03F2203/45616

  the IC comprising more than one switch, which are not cross coupled · CPC title

• H03F2203/45551

  the IC comprising one or more switched capacitors · CPC title