Method of manufacturing a display apparatus including a groove disposed in the middle area while surrounding the first hole in the transmission area

Patent metadata

Field	Value
Publication number	US-12531022-B2
Application number	US-202318544515-A
Country	US
Kind code	B2
Filing date	Dec 19, 2023
Priority date	Aug 31, 2020
Publication date	Jan 20, 2026
Grant date	Jan 20, 2026

Abstract

A display apparatus includes a substrate including a transmission area having a first through hole, a display area surrounding the transmission area, and a middle area disposed between the transmission area and the display area, a pixel circuit disposed on the display area, the pixel circuit including a first thin film transistor including a first semiconductor layer having polycrystalline silicon, and a second thin film transistor including a second semiconductor layer including an oxide semiconductor, a display element including a pixel electrode electrically connected to the pixel circuit, an opposite electrode disposed on the pixel electrode, and an intermediate layer disposed between the pixel electrode and the opposite electrode and including an emission layer, and a groove disposed in the middle area while surrounding the first through hole.

First claim

What is claimed is:

1 . A method of manufacturing a display apparatus, the method comprising:
forming a first semiconductor layer on a substrate, the first semiconductor layer including polycrystalline silicon and at least one inorganic insulating layer; forming a second semiconductor layer including an oxide semiconductor and a pair of pattern layers on an uppermost layer of the at least one inorganic insulating layer, the pair of pattern layers including a material that is the same as a material in the second semiconductor layer; forming a second hole in the at least one inorganic insulating layer, and a pair of tips by extending the at least one inorganic insulating layer using the pair of pattern layers as a mask; forming a first hole or a first recess in a base layer of the substrate, the first hole or the first recess overlapping the second hole in a plan view; and forming a display element including a pixel electrode, an opposite electrode, and an intermediate layer provided between the pixel electrode and the opposite electrode and including an emission layer.

2 . The method of claim 1 , wherein the first semiconductor layer and the second semiconductor layer are disposed on different layers from each other.

3 . The method of claim 2 , wherein the at least one inorganic insulating layer includes a first gate insulating layer and a second gate insulating layer disposed between the first semiconductor layer and the second semiconductor layer.

4 . The method of claim 1 , wherein the opposite electrode is disconnected by the pair of tips.

5 . The method of claim 1 , wherein the intermediate layer is disconnected by the pair of tips.

6 . The method of claim 5 , wherein the intermediate layer further comprises a first functional layer disposed between the pixel electrode and the emission layer and a second functional layer disposed between the emission layer and the opposite electrode,
the first functional layer comprises at least one of a hole transport layer and a hole injection layer, and the second functional layer comprises at least one of an electron transport layer and an electron injection layer.

7 . The method of claim 1 , further comprising forming a thin film encapsulation layer so as to continuously cover an internal surface of the second hole, an internal surface of the first hole or the first recess, and a bottom surface of the first hole or the first recess,
wherein the thin film encapsulation layer covers the display element and includes an inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer.

8 . The method of claim 1 , wherein the forming of the second semiconductor layer further comprises forming an upper electrode of a storage capacitor, and
the upper electrode includes a material that is same as a material included in the second semiconductor layer.

9 . A method of manufacturing an electronic device, the method comprising:
preparing a display apparatus; preparing a housing; and disposing the display apparatus in the housing, wherein the preparing the display apparatus comprises: forming a first semiconductor layer on a substrate, the first semiconductor layer including polycrystalline silicon and at least one inorganic insulating layer; forming a second semiconductor layer including an oxide semiconductor and a pair of pattern layers on an uppermost layer of the at least one inorganic insulating layer, the pair of pattern layers including a material that is the same as a material in the second semiconductor layer; forming a second hole in the at least one inorganic insulating layer, and a pair of tips by extending the at least one inorganic insulating layer using the pair of pattern layers as a mask; forming a first hole or a first recess in a base layer of the substrate, the first hole or the first recess overlapping the second hole in a plan view; and forming a display element including a pixel electrode, an opposite electrode, and an intermediate layer provided between the pixel electrode and the opposite electrode and including an emission layer.

10 . The method of claim 9 , wherein the first semiconductor layer and the second semiconductor layer are disposed on different layers from each other.

11 . The method of claim 10 , wherein the at least one inorganic insulating layer includes a first gate insulating layer and a second gate insulating layer disposed between the first semiconductor layer and the second semiconductor layer.

12 . The method of claim 10 , wherein the opposite electrode is disconnected by the pair of tips.

13 . The method of claim 9 , wherein the intermediate layer is disconnected by the pair of tips.

14 . The method of claim 9 , wherein the intermediate layer further comprises a first functional layer disposed between the pixel electrode and the emission layer and a second functional layer disposed between the emission layer and the opposite electrode,
the first functional layer comprises at least one of a hole transport layer and a hole injection layer, and the second functional layer comprises at least one of an electron transport layer and an electron injection layer.

15 . The method of claim 14 , further comprising forming a thin film encapsulation layer so as to continuously cover an internal surface of the second hole, an internal surface of the first hole or the first recess, and a bottom surface of the first hole or the first recess,
wherein the thin film encapsulation layer covers the display element and includes an inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer.

16 . The method of claim 9 , wherein the forming of the second semiconductor layer further comprises forming an upper electrode of a storage capacitor, and
the upper electrode includes a material that is same as a material included in the second semiconductor layer.

Assignees

• Samsung Display Co Ltd

Inventors

• Kim Jaybum
• Kim Myeongho
• Kim Yeonhong
• SON Kyoungseok
• Lee Sunhee
• Lee Seungjun
• Lee Seunghun

Classifications

• H10K59/8731

  multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers · CPC title

• H10D99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10D86/481

  integrated with passive devices, e.g. auxiliary capacitors · CPC title

• H10D86/471

  having different architectures, e.g. having both top-gate and bottom-gate TFTs · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title