Memory devices, systems, and methods for updating firmware with single memory device
US-2020301698-A1 · Sep 24, 2020 · US
US12530461B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12530461-B2 |
| Application number | US-202418663802-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 14, 2024 |
| Priority date | Mar 25, 2024 |
| Publication date | Jan 20, 2026 |
| Grant date | Jan 20, 2026 |
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A system and method for firmware updates on Execute-in-Place (XIP) devices with multiple memory partitions is disclosed. Firmware files include instructions coded to one of the partitions, while another partition runs the active firmware. An address remapping technique redirects the fetching addresses in the instructions to the partition storing the active firmware, so the instructions may be executed properly when the firmware files are installed in either partition. As a consequence, the firmware update file only requires one version, instead of multiple versions for multiple partitions, and this simplifies the firmware update process, such as compatibility verification and version control, saves memory space on the server, and reduces bandwidth usage.
Opening claim text (preview).
What is claimed is: 1 . A method for firmware update, comprising: receiving a first firmware update file, wherein the first firmware update file is coded with first partition addresses; determining that a boot partition of a memory of an Execute-in-Place (XIP) system is a second partition, the memory comprising a first partition and a second partition and the second partition comprising an initial firmware file coded with first partition addresses; based on determining that the boot partition is the second partition, remapping the first partition addresses to second partition addresses such that the initial firmware file coded with the first partition addresses is executable in the second partition; storing the first firmware update file in the first partition, and setting the first partition to be the boot partition in response to XIP system restarts; receiving a second firmware update file, wherein the second firmware update file is coded with the first partition addresses; determining that the boot partition of the memory is the first partition; and based on determining that the boot partition is the first partition, skipping a remapping from the first partition addresses to the second partition addresses; storing the second firmware update file in the second partition, and setting the second partition to be the boot partition in response to the XIP system restarts. 2 . The method for firmware update of claim 1 , wherein the remapping the first partition addresses to second partition addresses such that the initial firmware file coded with the first partition addresses is executable in the second partition comprises: accessing a fetch instruction associated with a first partition address; remapping the first partition address to a corresponding second partition address; and executing an instruction located in the corresponding second partition address. 3 . The method for firmware update of claim 2 , wherein the remapping the first partition address to the corresponding second partition address comprises: determining an offset between the first partition and the second partition; and determining the corresponding second partition address based on the offset and the first partition address. 4 . The method for firmware update of claim 2 , wherein: the first partition comprises a plurality of first partition addresses; and the second partition comprises a plurality of second partition addresses, each of the plurality of second partition addresses corresponds to each of the plurality of first partition addresses. 5 . The method for firmware update of claim 4 , wherein the remapping the first partition addresses to second partition addresses comprises: assigning a true value to a register of one or more processors to indicate that the address remapping is enabled; in response to assigning the true value to the register, storing a first partition start address, a first partition end address, and an offset between the first partition and the second partition, and determining that the fetching address is a first partition address based on the fetching address falls between the first partition start address and the first partition end address; and in response to determining that the fetching address is the first partition address, determining a remapped fetching address based on the fetching address and the offset, and fetching the first firmware update file from the second partition based on the remapped fetching address. 6 . The method for firmware update of claim 1 , further comprising: accessing the first firmware update file stored in the first partition; and executing the first firmware update file coded with first partition addresses from the first partition. 7 . The method of claim 1 , wherein: the memory further comprises a third partition, the third partition is independent from the first partition and the second partition; and a fetch instruction directed at the third partition is not remapped. 8 . The method of claim 1 , wherein the memory is a memory of an Execute-in-Place (XIP) system, wherein the XIP system is without a hardware memory management unit (MMU). 9 . A computing system, comprising: one or more processors; and a non-transitory memory storing instructions that, when executed by the one or more processors, configure the one or more processors to execute instructions comprising: receiving a first firmware update file, wherein the first firmware update file is coded with first partition addresses; determining that a boot partition of a memory of an Execute-in-Place (XIP) system is a second partition, the memory comprising a first partition and a second partition and the second partition comprising an initial firmware file coded with first partition addresses based on determining that the boot partition is the second partition, remapping the first partition addresses to second partition addresses such that the initial firmware file coded with the first partition addresses is executable in the second partition; storing the first firmware update file in the first partition, and setting the first partition to be the boot partition in response to XIP system restarts; receiving a second firmware update file, wherein the second firmware update file is coded with the first partition addresses; determining that the boot partition of the memory is the first partition; and based on determining that the boot partition is the first partition, skipping a remapping from the first partition addresses to the second partition addresses, storing the second firmware update file in the second partition, and setting the second partition to be the boot partition in response to the XIP system restarts. 10 . The computing system of claim 9 , wherein the remapping the first partition addresses to second partition addresses such that the initial firmware file coded with the first partition addresses is executable in the second partition comprises: accessing a fetch instruction associated with a first partition address; remapping the first partition address to a corresponding second partition address; and executing an instruction located in the corresponding second partition address. 11 . The computing system of claim 10 , wherein the remapping the first partition address to the corresponding second partition address comprises: determining an offset between the first partition and the second partition; and determining the corresponding second partition address based on the offset and the first partition address. 12 . The computing system of claim 10 , wherein: the first partition comprises a plurality of first partition addresses; and the second partition comprises a plurality of second partition addresses, each of the plurality of second partition addresses corresponds to each of the plurality of first partition addresses. 13 . The computing system of claim 12 , wherein the remapping the first partition addresses to second partition addresses comprises: assigning a true value to a register of the one or more processors to indicate that the address remapping is enabled; in response to assigning the true value to the register, storing a first partition start address, a first partition end address, and an offset between the first partition and the second partition, and determining that the fetching address is a first partition address based on the fetching address falls between the first partition start address and the first partition end address; and in response to determining that the fetching address is the first partition address, determining a re
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