Systems and methods for removing variable DC offset of periodic analog signals

US12526003B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12526003-B2
Application numberUS-202318469833-A
CountryUS
Kind codeB2
Filing dateSep 19, 2023
Priority dateSep 19, 2023
Publication dateJan 13, 2026
Grant dateJan 13, 2026

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  5. First independent claim

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Abstract

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A signal processing system and method for removing a direct-current (DC) component from an analog input signal input is provided. The signal processing system includes an input transmission line, a first reference measurement circuit, a second reference measurement circuit, a bias detection circuit, and a bias removal circuit. The method includes determining, via the first reference measurement circuit, a first measured peak signal; determining, via the second reference measurement circuit, a second measured peak signal; determining, via the bias detection circuit, a bias signal indicative of the DC component of the analog input signal based at least in part on the first and second measured peak signals; and generating, via the bias removal circuit, an analog output signal based at least in part on the analog input signal and the bias signal. The analog output signal is the analog input signal with the DC component removed therefrom.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method for removing a direct-current (DC) component from an analog input signal, the method comprising: determining, via a first reference measurement circuit of an analog signal processing system, a first measured peak signal based at least in part on the analog input signal; determining, via a second reference measurement circuit of the analog signal processing system, a second measured peak signal based at least in part on the analog input signal; responsive to determining the first measured peak signal and the second measured peak signal, determining, via a bias detection circuit of the analog signal processing system, a bias signal based at least in part on the first measured peak signal and the second measured peak signal, the bias signal indicative of the DC component of the analog input signal; and generating, via a bias removal circuit of the analog signal processing system, an analog output signal based at least in part on the bias signal and the analog input signal, wherein the analog output signal is the analog input signal with the DC component removed therefrom. 2 . The method of claim 1 , wherein determining the first measured peak signal comprises: receiving, at a high-pass filter (HPF) of the first reference measurement circuit, the analog input signal via an input transmission line of the analog signal processing system; removing, via the HPF, components of the analog input signal below an HPF frequency threshold, the components of the analog input signal removed by the HPF corresponding to a DC offset of the analog input signal; and responsive to removing the components of the analog input signal below the HPF frequency threshold, generating, via the HPF, a modified input signal based at least in part on the analog input signal. 3 . The method of claim 2 , wherein determining the first measured peak signal further comprises: receiving, at a peak detector of the first reference measurement circuit, the modified input signal from the HPF; measuring, via the peak detector of the first reference measurement circuit, a signal peak of the modified input signal; and responsive to measuring the signal peak, generating, via the peak detector of the first reference measurement circuit, a first peak signal based at least in part on the signal peak of the modified input signal. 4 . The method of claim 3 , wherein determining the first measured peak signal further comprises: receiving, at a smoothing circuit of the first reference measurement circuit, the first peak signal from the peak detector of the first reference measurement circuit; removing, via the smoothing circuit of the first reference measurement circuit, one or more signal infirmities from the first peak signal, the one or more signal infirmities produced by the peak detector of the first reference measurement circuit; and responsive to removing the one or more signal infirmities, generating, via the smoothing circuit of the first reference measurement circuit, the first measured peak signal. 5 . The method of claim 1 , wherein determining the second measured peak signal comprises: receiving, at a peak detector of the second reference measurement circuit, the analog input signal via an input transmission line of the analog signal processing system; measuring, via the peak detector of the second reference measurement circuit, a signal peak of the analog input signal; and responsive to measuring the signal peak, generating, via the peak detector of the second reference measurement circuit, a second peak signal based at least in part on the signal peak of the analog input signal. 6 . The method of claim 5 , wherein determining the second measured peak signal further comprises: receiving, at a smoothing circuit of the second reference measurement circuit, the second peak signal from the peak detector of the second reference measurement circuit; removing, via the smoothing circuit of the second reference measurement circuit, one or more signal infirmities from the second peak signal, the one or more signal infirmities produced by the peak detector of the second reference measurement circuit; and responsive to removing the one or more signal infirmities, generating, via the smoothing circuit of the second reference measurement circuit, the second measured peak signal. 7 . The method of claim 1 , wherein determining the bias signal comprises: receiving, at a first input of a first differential amplifier of the bias detection circuit, the first measured peak signal from the first reference measurement circuit; receiving, at a second input of the first differential amplifier, the second measured peak signal from the second reference measurement circuit; determining, via the first differential amplifier, a bias error between the first measured peak signal and the second measured peak signal; and responsive to determining the bias error, generating, via the first differential amplifier, a bias error signal based at least in part on the bias error between the first measured peak signal and the second measured peak signal. 8 . The method of claim 7 , wherein the bias error corresponds to the DC component of the analog input signal. 9 . The method of claim 7 , wherein determining the bias signal further comprises: receiving, at a low-pass filter (LPF) of the bias detection circuit, the bias error signal from the first differential amplifier; removing, via the LPF, components of the bias error signal above an LPF frequency threshold; and responsive to removing the components from the bias error signal, generating, via the LPF, a modified bias error signal based at least in part on the bias error signal received from the first differential amplifier. 10 . The method of claim 9 , wherein determining the bias signal further comprises: receiving, at a buffer of the bias detection circuit, the modified bias error signal from the LPF; applying, via the buffer, a voltage gain to the bias error signal; and responsive to applying the voltage gain, generating, via the buffer, the bias signal based at least in part on the modified bias error signal. 11 . The method of claim 1 , wherein generating the analog output signal comprises: receiving, at a first input of a second differential amplifier of the bias removal circuit, the bias signal from the bias detection circuit; receiving, at a second input of the second differential amplifier, the analog input signal via an input transmission line of the analog signal processing system; determining, via the second differential amplifier, an output error between the bias signal and the analog input signal; and responsive to determining the output error, generating, via the second differential amplifier, the analog output signal based at least in part on the output error between the bias signal and the analog input signal. 12 . The method of claim 11 , wherein the output error corresponds to an alternating-current (AC) component of the analog input signal. 13 . A signal processing system comprising: an input transmission line operable to provide an analog input signal to the signal processing system, the analog input signal comprising a direct-current (DC) component and an alternating-current (AC) component; a first reference measurement circuit coupled to the input transmission line, the first reference measurement circuit configured to generate a first measured peak signal based at least in part on the analog input signal; a second reference measurement circuit coupled to the input transmission line, the second reference measurement circuit configured to generate a secon

Assignees

Inventors

Classifications

  • H04B1/1036Primary

    with automatic suppression of narrow band noise or interference, e.g. by using tuneable notch filters (H04B1/123 takes precedence; filter circuits H03H) · CPC title

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What does patent US12526003B2 cover?
A signal processing system and method for removing a direct-current (DC) component from an analog input signal input is provided. The signal processing system includes an input transmission line, a first reference measurement circuit, a second reference measurement circuit, a bias detection circuit, and a bias removal circuit. The method includes determining, via the first reference measurement…
Who is the assignee on this patent?
Battelle Savannah River Alliance Llc
What technology area does this patent fall under?
Primary CPC classification H04B1/1036. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 13 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).