Semiconductor device and method of forming double-sided rectifying antenna on power module

US12525518B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12525518-B2
Application numberUS-202318314626-A
CountryUS
Kind codeB2
Filing dateMay 9, 2023
Priority dateMay 9, 2023
Publication dateJan 13, 2026
Grant dateJan 13, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device has a substrate and a first electrical interconnect structure formed over a first surface of the substrate. A second electrical interconnect structure is formed over a second surface of the substrate. An electrical component is disposed over the first surface of the substrate or over the second surface of the substrate. A first antenna is formed over the first electrical interconnect structure. A second antenna is formed over the second electrical interconnect structure. The first electrical interconnect structure has an insulating material formed over the first surface of the substrate, and a conductive via formed through the insulating material. Alternatively, the first electrical interconnect structure has an insulating layer formed over the first surface of the substrate, a conductive layer formed over the insulating layer, and a conductive via formed through the insulating layer and conductive layer.

First claim

Opening claim text (preview).

What is claimed: 1 . A semiconductor device, comprising: a substrate; a first electrical interconnect structure formed over a first surface of the substrate; a first conductive via extending through the substrate and further extending through the first electrical interconnect structure; a second electrical interconnect structure formed over a second surface of the substrate opposite the first surface of the substrate; a device layer formed over the second electrical interconnect structure; a second conductive via extending through the device layer; a first antenna formed over the first electrical interconnect structure; and a second antenna formed over the device layer. 2 . The semiconductor device of claim 1 , wherein the device layer includes an electrical component disposed over the second surface of the substrate. 3 . The semiconductor device of claim 2 , wherein the device layer further includes an insulating material formed over the electrical component and second surface of the substrate. 4 . The semiconductor device of claim 1 , further including: an insulating layer formed over the first surface of the substrate or over the second surface of the substrate; a conductive layer formed over the insulating layer; and a conductive via formed through the insulating layer and conductive layer. 5 . The semiconductor device of claim 1 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate. 6 . The semiconductor device of claim 1 , wherein the first electrical interconnect structure and second electrical interconnect structure provide isolation between the first antenna and second antenna. 7 . A semiconductor device, comprising: a substrate; a first antenna disposed over a first surface of the substrate; and a second antenna disposed over a second surface of the substrate opposite the first surface of the substrate and adapted to operate simultaneously with the first antenna and at a different frequency from the first antenna; further including: a first electrical interconnect structure formed over the first surface of the substrate; a first conductive via extending through the substrate and first electrical interconnect structure; a second electrical interconnect structure formed over the second surface of the substrate; a device layer formed over the second electrical interconnect structure; and a second conductive via extending through the device layer. 8 . The semiconductor device of claim 7 , further including an electrical component disposed over the first surface of the substrate or over the second surface of the substrate. 9 . The semiconductor device of claim 7 , wherein the device layer includes an insulating material formed over the second surface of the substrate. 10 . The semiconductor device of claim 7 , further including: an insulating layer formed over the first surface of the substrate or over the second surface of the substrate; a conductive layer formed over the insulating layer; and a conductive via formed through the insulating layer and conductive layer. 11 . The semiconductor device of claim 7 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate. 12 . The semiconductor device of claim 7 , wherein the first electrical interconnect structure and second electrical interconnect structure provide isolation between the first antenna and second antenna. 13 . A method of making a semiconductor device, comprising: providing a substrate; forming a first electrical interconnect structure over a first surface of the substrate; forming a first conductive via extending through the substrate and first electrical interconnect structure; forming a second electrical interconnect structure over a second surface of the substrate opposite the first surface of the substrate; forming a first antenna over the first electrical interconnect structure; and forming a second antenna over the second electrical interconnect structure. 14 . The method of claim 13 , further including disposing an electrical component over the first surface of the substrate or over the second surface of the substrate. 15 . The method of claim 13 , further including: forming an insulating material over the first surface of the substrate or over the second surface of the substrate; and forming a conductive via through the insulating material. 16 . The method of claim 13 , further including: forming an insulating layer over the first surface of the substrate or over the second surface of the substrate; forming a conductive layer over the insulating layer; and forming a conductive via through the insulating layer and conductive layer. 17 . The method of claim 13 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate. 18 . The method of claim 13 , wherein the first electrical interconnect structure and second electrical interconnect structure provide isolation between the first antenna and second antenna. 19 . The method of claim 13 , further including: forming a device layer over the second electrical interconnect structure; and forming a second conductive via extending through the device layer, wherein the second antenna is formed over the device layer. 20 . A method of making a semiconductor device, comprising: providing a substrate; disposing a first antenna over a first surface of the substrate; disposing a second antenna over a second surface of the substrate opposite the first surface of the substrate and adapted to operate simultaneously with the first antenna and at a different frequency from the first antenna; forming a first electrical interconnect structure over the first surface of the substrate; a second electrical interconnect structure formed over the second surface of the substrate; forming a device layer over the second electrical interconnect structure; and forming a second conductive via extending through the device layer, wherein the second antenna is formed over the device layer. 21 . The method of claim 20 , further including disposing an electrical component over the first surface of the substrate or over the second surface of the substrate. 22 . The method of claim 20 , further including: forming an insulating material over the first surface of the substrate or over the second surface of the substrate; and forming a conductive via through the insulating material. 23 . The method of claim 20 , further including: forming an insulating layer over the first surface of the substrate or over the second surface of the substrate; forming a conductive layer over the insulating layer; and forming a conductive via through the insulating layer and conductive layer. 24 . The method of claim 20 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate.

Assignees

Inventors

Classifications

  • comprising multiple insulating layers · CPC title

  • of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) · CPC title

  • Inductive arrangements (H10W44/20 takes precedence) · CPC title

  • Shapes or dispositions of interconnections · CPC title

  • Soldering or alloying · CPC title

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What does patent US12525518B2 cover?
A semiconductor device has a substrate and a first electrical interconnect structure formed over a first surface of the substrate. A second electrical interconnect structure is formed over a second surface of the substrate. An electrical component is disposed over the first surface of the substrate or over the second surface of the substrate. A first antenna is formed over the first electrical …
Who is the assignee on this patent?
Stats Chippac Pte Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/701. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 13 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).