Semiconductor devices and methods of manufacturing thereof

Patent metadata

Field	Value
Publication number	US-12525482-B2
Application number	US-202117459784-A
Country	US
Kind code	B2
Filing date	Aug 27, 2021
Priority date	Aug 27, 2021
Publication date	Jan 13, 2026
Grant date	Jan 13, 2026

Abstract

A method for making a semiconductor device includes forming a first fin structure, a second fin structure, and a third fin structure over a substrate. The first through third fin structures all extend along a first lateral direction, and the second fin structure is disposed between the first and third fin structures. The method includes forming a mold by filling up trenches between neighboring ones of the first through third fin structures with a first dielectric material. The method includes cutting the second fin structure by removing an upper portion of the second fin structure. The method includes replacing the upper portion of the second fin structure with a second dielectric material to form a dielectric cut structure. The method includes recessing the mold to expose upper portions of the first fin structure and the third fin structure, respectively.

First claim

What is claimed is:

1 . A method for making a semiconductor device, comprising:
forming a first fin structure, a second fin structure, and a third fin structure over a substrate, wherein the first through third fin structures all extend along a first lateral direction, and the second fin structure is disposed between the first and third fin structures; forming a mold by filling up trenches between neighboring ones of the first through third fin structures with a first dielectric material, wherein respective upper surfaces of the mold and the first through third fin structures are aligned with one another; after forming the mold, removing an upper portion of the second fin structure to form a recess extending along the first lateral direction, wherein the recess is formed through the mold being exposed and partially extends into the second fin structure, causing the upper surface of the second fin structure to be vertically interposed between the upper surface of the mold and a lower surface of the mold; forming a dielectric cut structure by filling the recess with a second dielectric material different from the first dielectric material, wherein the dielectric cut structure extends also along the first lateral direction and directly contacts remaining portions of the second fin structure, and wherein the second dielectric material has a higher etch selectivity relative to the first dielectric material during a fin removal process; and recessing the mold, causing upper portions of the first fin structure and the third fin structure to protrude from the recessed mold.

2 . The method of claim 1 , further comprising forming a gate structure that extends along a second lateral direction perpendicular to the first lateral direction, wherein the gate structure straddles a first portion of the first fin structure, a second portion of the second fin structure, and a third portion of the third fin structure, respectively.

3 . The method of claim 2 , wherein the second portion includes a cut sidewall facing the first lateral direction.

4 . The method of claim 3 , further comprising forming a first pair of source/drain structures in the first fin structure on opposite sides of the gate structure, a second source/drain structure in the second fin structure on a side opposite the gate structure from the cut sidewall, and a third pair of source/drain structures in the third fin structure on opposite sides of the gate structure.

5 . The method of claim 1 , wherein the step of cutting the second fin structure comprises etching the upper portion of the second fin structure, while using the mold as an etch stop layer.

6 . The method of claim 1 , wherein the step of recessing the mold comprises exposing an upper portion of the dielectric cut structure.

7 . The method of claim 1 , wherein the step of recessing the mold comprises exposing an upper portion of the dielectric cut structure, and wherein subsequently to the step of recessing the mold, the method further comprises modifying a profile of the dielectric cut structure.

8 . The method of claim 1 , wherein the first through third fin structures each include a plurality of semiconductor layers vertically spaced from each other.

9 . A method for making a semiconductor device, comprising:
forming a first fin structure protruding from a substrate, wherein the first fin structure extends along a first lateral direction; depositing a first dielectric material extending along sidewalls of the first fin structure to form a mold, wherein the first dielectric material has a substantially lower etch rate in a fin removal process compared to an etch rate of the first fin structure, wherein respective upper surfaces of the mold and the first fin structure are aligned with one another; performing the fin removal process to remove a portion of the first fin structure, while using the mold as an etch stop layer, wherein during the removing, the mold, being exposed, prevents lateral etching into regions adjacent to the removed portion, causing the upper surface of the first fin structure to be vertically interposed between the upper surface of the mold and a lower surface of the mold; and filling the removed portion with a second dielectric material to form a dielectric cut structure, wherein the dielectric cut structure extends also along the first lateral direction and directly contacts remaining portions of the first fin structure, and wherein the second dielectric material has a higher etch selectivity relative to the first dielectric material.

10 . The method of claim 9 , further comprising forming a second fin structure protruding from the substrate, wherein the second fin structure also extends along the first lateral direction.

11 . The method of claim 10 , further comprising recessing the mold to expose upper portions of the dielectric cut structure and the second fin structure, respectively.

12 . The method of claim 10 , further comprising:
recessing the mold to expose upper portions of the dielectric cut structure and the second fin structure, respectively; and modifying a profile of the dielectric cut structure.

13 . The method of claim 9 , further comprising forming a gate structure that extends along a second lateral direction perpendicular to the first lateral direction, wherein the gate structure extends a cut sidewall facing the first lateral direction.

14 . The method of claim 13 , further comprising forming a source/drain structure in the first fin structure on a side opposite the gate structure from the cut sidewall.

15 . A method for making a semiconductor device, comprising:
forming a first fin structure protruding from a substrate, wherein the first fin structure extends along a first lateral direction; forming a second fin structure protruding from the substrate, wherein the second fin structure also extends along the first lateral direction; depositing a first dielectric material extending along sidewalls of the first fin structure to form a mold, wherein the first dielectric material has a substantially lower etch rate in a fin removal process compared to an etch rate of the first fin structure, and wherein respective upper surfaces of the mold and the first and second fin structures are aligned with one another; performing the fin removal process to remove a portion of the first fin structure, while using the mold as an etch stop layer, wherein during the removing, the mold, being exposed, prevents lateral etching into regions adjacent to the removed portion, causing the upper surface of the fin structure to be vertically interposed between the upper surface of the mold and a lower surface of the mold; and filling the removed portion with a second dielectric material to form a dielectric cut structure, wherein the dielectric cut structure extends also along the first lateral direction and directly contacts remaining portions of the first fin structure, and wherein the second dielectric material has a higher etch selectivity relative to the first dielectric material.

16 . The method of claim 15 , further comprising recessing the mold to expose upper portions of the dielectric cut structure and the second fin structure, respectively.

17 . The method of claim 15 , further comprising:
recessing the mold to expose upper portions of the dielectric cut structure and the second fin structure, respectively; and modifying a profile of the dielectric cut structure.

18 . The method of claim 15 , further comprising forming a gate structure that extends along a second lateral dire

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Lin Shih-Yao
• Chu Cheng-Tien
• Yang Chi-Wei
• Lee Hsiao Wen
• Lin Chih-Han
• Lin Jr-Jung

Classifications

• H10W10/0145

  of trenches having shapes other than rectangular or V-shape (H10W10/0143 takes precedence) · CPC title

• H10W10/17 Primary

  formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10D84/834

  comprising FinFETs · CPC title

• H10D84/0158

  the components including FinFETs · CPC title

• H10D84/0151 Primary

  Manufacturing their isolation regions · CPC title