Semiconductor structure having composite mold layer
US-2022223604-A1 · Jul 14, 2022 · US
US12524348B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12524348-B2 |
| Application number | US-202318505247-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 9, 2023 |
| Priority date | Jan 20, 2023 |
| Publication date | Jan 13, 2026 |
| Grant date | Jan 13, 2026 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
An operating method of a set-associative cache includes selecting one way group from among a first way group and a second way group with different threshold voltages based on an operation state of the set-associative cache, increasing a number of ways to which power is supplied in the selected one way group, analyzing a change in an operation state of a system including the set-associative cache as the number of ways to which the power is supplied is increased, and determining whether to further increase the number of ways to which the power is supplied based on an analyzed change in the operation state of the system.
Opening claim text (preview).
What is claimed is: 1 . An operating method of a set-associative cache, the operating method comprising: selecting, based on an operation state of the set-associative cache, one way group from among a first way group and a second way group with different threshold voltages, wherein the first way group and the second way group are in the same set of the set-associative cache, wherein the first way group includes a first number of a plurality of first ways having a plurality of first transistors having a first threshold voltage, and wherein the second way group includes a second number of a plurality of second ways having a plurality of second transistors having a second threshold voltage different from the first threshold voltage; increasing a number of ways of the selected one way group to which power is supplied; analyzing a change in an operation state of a system including the set-associative cache as the number of ways of the selected one way group to which the power is supplied is increased; and determining, based on an analyzed change in the operation state of the system, whether to further increase the number of ways of the selected one way group that the power is supplied. 2 . The operating method of claim 1 , wherein the selecting of the one way group comprises selecting the second way group having the plurality of second transistors with the second threshold voltage lower than the first threshold voltage when a clock frequency of the set-associative cache is greater than a frequency threshold. 3 . The operating method of claim 1 , wherein the selecting of the one way group comprises selecting the first way group having the plurality of first transistors with the first threshold voltage higher than the second threshold voltage when a supply voltage of the set-associative cache is less than a voltage threshold. 4 . The operating method of claim 1 , wherein the selecting of the one way group comprises: selecting the first way group when the power is not supplied to all of the first number of the plurality of first ways of the first way group; and selecting the second way group when the power is supplied to all of the first number of the plurality of first ways of the first way group. 5 . The operating method of claim 1 , wherein the first way group includes regular voltage threshold (RVT)-based static random access memory (SRAM), and the second way group includes low voltage threshold (LVT)-based SRAM. 6 . The operating method of claim 1 , wherein the analyzing of the change comprises analyzing a change in power consumption of the system. 7 . The operating method of claim 6 , wherein the analyzing of the change in the power consumption of the system comprises analyzing a change in power consumption of a memory of the system and a change in power consumption of the set-associative cache. 8 . The operating method of claim 6 , wherein the analyzing of the change in the power consumption of the system comprises analyzing a change in power consumption of an IP block of the system. 9 . The operating method of claim 1 , wherein the analyzing of the change comprises analyzing a change in performance metric of an IP block of the system. 10 . The operating method of claim 9 , wherein the performance metric of the IP block comprises at least one of changes in execution time, frame per second (fps), instruction per clock (IPC), response time, latency, throughput, and performance per watt of the IP block. 11 . The operating method of claim 1 , wherein the determining of whether to further increase the number of ways of the selected one way group to which the power is supplied comprises: determining not to further increase the number of ways of the selected one way group to which the power is supplied when, as the number of ways of the selected one way group to which the power is supplied increases, power consumption of the system increases. 12 . The operating method of claim 1 , wherein the determining of whether to further increase the number of ways of the selected one way group to which the power is supplied comprises: determining not to further increase the number of ways of the selected one way group to which the power is supplied when, as the number of ways of the selected one way group to which the power is supplied increases, a sum of power consumption of a memory of the system and power consumption of the set-associative cache increases. 13 . The operating method of claim 1 , wherein the determining of whether to further increase the number of ways of the selected one way group to which the power is supplied comprises: determining not to further increase the number of ways of the selected one way group to which the power is supplied when, as the number of ways of the selected one way group to which the power is supplied increases, a sum of power consumption of a memory of the system, power consumption of the set-associative cache, and power consumption of an IP block of the system increases. 14 . The operating method of claim 1 , wherein the determining of whether to further increase the number of ways of the selected one way group to which the power is supplied comprises: determining not to further increase the number of ways of the selected one way group to which the power is supplied when, as the number of ways of the selected one way group to which the power is supplied increases, a performance metric of an IP block of the system is reduced. 15 . The operating method of claim 1 , wherein the determining of whether to further increase the number of ways of the selected one way group to which the power is supplied comprises: determining not to further increase the number of ways of the selected one way group to which the power is supplied regardless of a change in performance metric of an IP block of the system when, as the number of ways to which the power is supplied increases, power consumption of the system increases. 16 . A system comprising: a set-associative cache; and a controller configured to perform an operating method of the set-associative cache, wherein the controller is configured to: select, based on an operation state of the set-associative cache, one way group from among a first way group and a second way group with different threshold voltages, wherein the first way group and the second way group are the same set of the set-associative cache, wherein the first way group includes a plurality of first transistors having a first threshold voltage and a first number of a plurality of ways, and wherein the second way group includes a plurality of second transistors having a second threshold voltage different from the first threshold voltage and a second number of a plurality of ways; increase a number of ways of the selected one way group to which power is supplied; analyze a change in an operation state of a system including the set-associative cache as the number of ways of the selected one way group to which the power is supplied is increased; and determine whether to further increase the number of ways of the selected one way group to which the power is supplied based on an analyzed change in the operation state of the system. 17 . The system of claim 16 , further comprising: at least one IP block; and a memory, wherein the controller includes one of a cache controller and a power controller. 18 . An operating method of a set-associative cache, the operating method comprising: analyzing throughput of an IP block; selecting, base
Way prediction in set-associative cache · CPC title
Power saving characterised by the action undertaken · CPC title
using replacement algorithms · CPC title
Controller construction arrangements · CPC title
Power efficiency · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.