Display substrate including ring storage capacitor, manufacturing method thereof, and display apparatus having same

Patent metadata

Field	Value
Publication number	US-12520667-B2
Application number	US-202117779143-A
Country	US
Kind code	B2
Filing date	Jul 12, 2021
Priority date	Jul 12, 2021
Publication date	Jan 6, 2026
Grant date	Jan 6, 2026

Abstract

Provided is a display substrate and a manufacturing method therefor, and a display apparatus. The display substrate includes multiple sub-pixels, at least one sub-pixel includes a drive circuit layer disposed on the substrate, the drive circuit layer includes a ring storage capacitor constituting a pixel drive circuit; the ring storage capacitor includes a first electrode plate and a second electrode plate, wherein, the first electrode plate includes a first housing surrounding at least one first opening and the second electrode plate includes a second housing surrounding at least one second opening; an orthographic projection of the first housing on the substrate at least partially overlaps an orthographic projection of the second housing on the substrate, and the first housing and the second housing form a capacitor housing around at least one capacitor opening.

First claim

The invention claimed is:

1 . A display substrate comprising a plurality of sub-pixels, wherein
at least one sub-pixel comprises a drive circuit layer disposed on the substrate, the drive circuit layer comprises a ring storage capacitor constituting a pixel drive circuit, the ring storage capacitor comprises a first electrode plate and a second electrode plate, the first electrode plate comprises a first housing surrounding at least one first opening, the second electrode plate comprises a second housing surrounding at least one second opening, an orthographic projection of the first housing on the substrate at least partially overlaps an orthographic projection of the second housing on the substrate, and the first housing and the second housing form a capacitor housing around at least one capacitor opening.

2 . The display substrate of claim 1 , wherein
the orthographic projection of the second housing on the substrate is within the range of the orthographic projection of the first housing on the substrate, and the orthographic projection of the first opening on the substrate is within the range of the orthographic projection of the second opening on the substrate.

3 . The display substrate of claim 1 , wherein
the capacitor housing comprises a first bezel, a second bezel, a third bezel and a fourth bezel forming a ring, and at least one spacer bezel; the first bezel and the third bezel are oppositely arranged, and the second bezel and the fourth bezel are oppositely arranged; and a first end of at least one spacer bezel is connected to the first bezel, and a second end of the spacer bezel is connected to the third bezel.

4 . The display substrate of claim 1 , wherein
a side of the drive circuit layer away from the substrate is provided with an emitting structure layer, the emitting structure layer comprises a pixel define layer, and a pixel opening defining a light-emitting region is provided on the pixel define layer; and an orthographic projection of the ring storage capacitor on the substrate does not overlap an orthographic projection of the pixel opening on the substrate; or a side of the drive circuit layer away from the substrate is provided with an emitting structure layer, and the emitting structure layer comprises a pixel define layer, and a pixel opening defining a light-emitting region is provided on the pixel define layer; and the orthographic projection of the ring storage capacitor on the substrate at least partially overlaps the orthographic projection of the pixel opening on the substrate.

5 . The display substrate of claim 4 , wherein an orthographic projection of the at least one capacitor opening on the substrate is within the range of an orthographic projection of the pixel opening on the substrate.

6 . The display substrate of claim 4 , wherein
the orthographic projection of the ring storage capacitor on the substrate at least partially overlapping the orthographic projection of the pixel opening on the substrate comprises any one or more of the following: the orthographic projection of the first bezel on the substrate is within the range of the orthographic projection of the pixel opening on the substrate, the orthographic projection of the second bezel on the substrate is within the range of the orthographic projection of the pixel opening on the substrate, the orthographic projection of the third bezel on the substrate is within the range of the orthographic projection of the pixel opening on the substrate, and the orthographic projection of the fourth bezel on the substrate is within the range of the orthographic projection of the pixel opening on the substrate.

7 . The display substrate of claim 4 , wherein the orthographic projection of the ring storage capacitor on the substrate at least partially overlapping the orthographic projection of the pixel opening on the substrate comprises any one or more of the following:
an orthographic projection of an outer edge of the first bezel on the substrate substantially overlaps an orthographic projection of an edge of the pixel opening on the substrate, an orthographic projection of an outer edge of the second bezel on the substrate substantially overlaps an orthographic projection of an edge of the pixel opening on the substrate, an orthographic projection of the outer edge of the third bezel on the substrate substantially overlaps an orthographic projection of an edge of the pixel opening on the substrate, and an orthographic projection of the outer edge of the fourth bezel on the substrate substantially overlaps an orthographic projection of an edge of the pixel opening on the substrate.

8 . The display substrate of claim 1 , wherein in a plane parallel to the display substrate, the shape of the capacitor opening comprises any one or more of the following: triangle, rectangle, trapezoid, parallelogram, pentagon, hexagon, circle and ellipse; and/or
the first electrode plate and the second electrode plate are transparent conductive layers forming a transparent ring storage capacitor.

9 . The display substrate of claim 1 , wherein the number of capacitor openings is plural.

10 . The display substrate of claim 9 , wherein
the plurality of sub-pixels comprise a first sub-pixel, a second sub-pixel, a third sub-pixel and a fourth sub-pixel arranged in sequence along a first direction, a plurality of capacitor openings in at least one sub-pixel are arranged in sequence along a second direction, the number of capacitor openings in the four sub-pixels is different, and the first direction intersects the second direction.

11 . The display substrate of claim 10 , wherein
the number of capacitor openings in the first sub-pixel is 5, the number of capacitor openings in the second sub-pixel is 2, the number of capacitor openings in the third sub-pixel is 3, and the number of capacitor openings in the fourth sub-pixel is 4.

12 . The display substrate of claim 1 , wherein the ratio of an area of the orthographic projection of the capacitor opening on the substrate to an area of the orthographic projection of the capacitor housing on the substrate is 0.8 to 1.2.

13 . The display substrate of claim 1 , wherein
the drive circuit layer of at least one sub-pixel comprises a first conductive layer, a second conductive layer, a semiconductor layer, a third conductive layer and a fourth conductive layer sequentially arranged on the substrate, the first electrode plate of the ring storage capacitor is located on the first conductive layer, and the second electrode plate of the ring storage capacitor is located on the semiconductor layer.

14 . The display substrate of claim 13 , wherein
within at least one sub-pixel, the pixel drive circuit further comprises a first transistor, a second transistor, and a third transistor, active layers of the first, second and third transistors are located on the semiconductor layer, gate electrodes of the first, second and third transistors are located on the third conductive layer, and first and second electrodes of the first, second and third transistors are located on the fourth conductive layer.

15 . The display substrate of claim 13 , wherein
in at least one sub-pixel, the pixel drive circuit further comprises a first scan signal line, a second scan signal line, a first power supply line, a data line and a compensation signal line, the first scan signal line and the second scan signal line are located on the third conductive layer, and the first power supply line, the data line and the compensation signal line are located on the fourth cond

Assignees

• Hefei Boe Joint Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Yuan Can
• Li Yongqian
• Zhang Maoning
• Jiao Chao
• Yuan Zhidong
• Zhang Dacheng

Classifications

• H10K59/80524

  Transparent cathodes, e.g. comprising thin metal layers · CPC title

• H10K59/351

  comprising more than three subpixels, e.g. red-green-blue-white [RGBW] · CPC title

• H10K59/126

  Shielding, e.g. light-blocking means over the TFTs · CPC title

• H10K59/122 Primary

  Pixel-defining structures or layers, e.g. banks · CPC title

• H10K59/1201

  Manufacture or treatment · CPC title