Display device

US12520588B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12520588-B2
Application numberUS-202318104478-A
CountryUS
Kind codeB2
Filing dateFeb 1, 2023
Priority dateApr 6, 2022
Publication dateJan 6, 2026
Grant dateJan 6, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes a first voltage line disposed in a first metal layer on a substrate and extending in a first direction, a first transistor including a source electrode disposed in an active layer on the first metal layer and a gate electrode disposed in a second metal layer on the active layer, the first transistor being electrically connected to the first voltage line, a first connection electrode disposed in the second metal layer and integrally formed with the gate electrode of the first transistor, a cover pattern disposed in the second metal layer and spaced apart from the first connection electrode in the first direction, and a first capacitor including a first capacitor electrode disposed in the active layer and electrically connected to the gate electrode of the first transistor, and a second capacitor electrode disposed in the first metal layer and electrically connected to the source electrode of the first transistor. A first side of the cover pattern and a first side of the first connection electrode facing each other overlap the first capacitor electrode in a plan view.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display device comprising: a first voltage line disposed in a first metal layer on a substrate and extending in a first direction; a first transistor including a source electrode disposed in an active layer on the first metal layer and a gate electrode disposed in a second metal layer on the active layer, the first transistor being electrically connected to the first voltage line; a first connection electrode disposed in the second metal layer and integrally formed with the gate electrode of the first transistor; a cover pattern disposed in the second metal layer and spaced apart from the first connection electrode in the first direction; and a first capacitor including a first capacitor electrode disposed in the active layer and electrically connected to the gate electrode of the first transistor, and a second capacitor electrode disposed in the first metal layer and electrically connected to the source electrode of the first transistor, wherein a first side of the cover pattern and a first side of the first connection electrode facing each other overlap the first capacitor electrode in a plan view. 2 . The display device of claim 1 , wherein a first width of the cover pattern and a second width of the first connection electrode in a second direction are equal, and the second direction intersects the first direction. 3 . The display device of claim 1 , wherein a second side of the cover pattern adjacent to the first side of the cover pattern and a second side the first connection electrode adjacent to the first side of the first connection electrode are colinear with each other. 4 . The display device of claim 1 , further comprising: a data line disposed in the first metal layer and extending in the first direction; and a second transistor including a source electrode and a drain electrode and electrically connecting the data line and the first capacitor electrode. 5 . The display device of claim 4 , wherein the source electrode of the second transistor and the first capacitor electrode are integral with each other. 6 . The display device of claim 4 , further comprising: a second connection electrode disposed in the second metal layer and electrically connecting the data line and the drain electrode of the second transistor. 7 . The display device of claim 1 , further comprising: an initialization voltage line disposed in the first metal layer and extending in the first direction; and a third transistor including a source electrode and a drain electrode and electrically connecting the initialization voltage line and the source electrode of the first transistor. 8 . The display device of claim 7 , further comprising: a third connection electrode disposed in the second metal layer and electrically connecting the initialization voltage line and the source electrode of the third transistor. 9 . The display device of claim 7 , further comprising: a fourth connection electrode disposed in the second metal layer and electrically connecting the source electrode of the first transistor, the drain electrode of the third transistor, and the second capacitor electrode. 10 . The display device of claim 1 , further comprising: a fifth connection electrode disposed in the second metal layer, electrically connected to the second capacitor electrode, and integrally formed with the cover pattern. 11 . The display device of claim 10 , further comprising: a first electrode disposed in a third metal layer on the second metal layer, extending in the first direction, and electrically connected to the fifth connection electrode; and a second electrode disposed in the third metal layer and extending in parallel to the first electrode. 12 . The display device of claim 11 , further comprising: light-emitting elements arranged between the first electrode and the second electrode; a second voltage line disposed in the second metal layer and extending in a second direction intersecting the first direction; a first contact electrode disposed in a fourth metal layer on the third metal layer and electrically connecting the first electrode and the light-emitting elements; and a second contact electrode disposed in the fourth metal layer and electrically connecting the second voltage line and the light-emitting elements. 13 . The display device of claim 1 , wherein the cover pattern is electrically floated. 14 . The display device of claim 1 , further comprising: a vertical gate line disposed in the first metal layer and extending in the first direction; a horizontal gate line disposed in the second metal layer and extending in a second direction intersecting the first direction; and an auxiliary gate line extending in the first direction from the horizontal gate line. 15 . A display device comprising: a first metal layer disposed on a substrate; an active layer disposed on the first metal layer; a second metal layer disposed on the active layer; a first transistor including a source electrode disposed in the active layer and a gate electrode disposed in the second metal layer; a first connection electrode disposed in the second metal layer and integrally formed with the gate electrode of the first transistor; a cover pattern disposed in the second metal layer and spaced apart from the first connection electrode in a first direction; and a first capacitor including a first capacitor electrode disposed in the active layer and electrically connected to the gate electrode of the first transistor, and a second capacitor electrode disposed in the first metal layer and electrically connected to the source electrode of the first transistor, wherein a first width of the cover pattern and a second width of the first connection electrode in a second direction are equal, and the second direction intersects the first direction. 16 . The display device of claim 15 , wherein a first side of the cover pattern and a first side of the first connection electrode facing each other overlap the first capacitor electrode in a plan view. 17 . The display device of claim 16 , wherein a second side of the cover pattern adjacent to the first side of the cover pattern and a second side of the first connection electrode adjacent to the first side of the first connection electrode are colinear with each other. 18 . The display device of claim 15 , further comprising: a data line disposed in the first metal layer and extending in the first direction; and a second transistor electrically connecting the data line and the first capacitor electrode. 19 . The display device of claim 15 , further comprising: an initialization voltage line disposed in the first metal layer and extending in the first direction; and a third transistor electrically connecting the initialization voltage line and the source electrode of the first transistor. 20 . The display device of claim 15 , further comprising: a first electrode disposed in a third metal layer on the second metal layer and extending in the first direction; a second electrode disposed in the third metal layer and extending in parallel to the first electrode; and a plurality of light-emitting elements arranged in the first direction between the first electrode and the second electrode.

Assignees

Inventors

Classifications

  • H10W90/00Primary

    Package configurations · CPC title

  • H10D86/441Primary

    Interconnections, e.g. scanning lines · CPC title

  • H10D86/481Primary

    integrated with passive devices, e.g. auxiliary capacitors · CPC title

  • characterised by their shape · CPC title

  • Interconnections, e.g. wiring lines or terminals · CPC title

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What does patent US12520588B2 cover?
A display device includes a first voltage line disposed in a first metal layer on a substrate and extending in a first direction, a first transistor including a source electrode disposed in an active layer on the first metal layer and a gate electrode disposed in a second metal layer on the active layer, the first transistor being electrically connected to the first voltage line, a first connec…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 06 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).