Functional substrate and method for manufacturing the same, and electronic device

Patent metadata

Field	Value
Publication number	US-12520429-B2
Application number	US-202218276636-A
Country	US
Kind code	B2
Filing date	Jul 27, 2022
Priority date	Jul 27, 2022
Publication date	Jan 6, 2026
Grant date	Jan 6, 2026

Abstract

A functional substrate includes a first dielectric substrate, which includes a first surface and a second surface oppositely arranged along a thickness direction of the first dielectric substrate; the first dielectric substrate is provided with a first connection hole at least penetrating through the first surface; a first connection electrode is arranged in the first connection hole, which includes a first sub-hole and a second sub-hole sequentially arranged along a direction away from the second surface and communicated with each other; the second sub-hole penetrates through the first surface; an opening width of the second sub-hole is monotonically increased in the direction away from the second surface, and a minimum opening width of the second sub-hole is not smaller than a maximum opening width of the first sub-hole; the first and second sub-holes form a corner at a position where the first sub-hole and the second sub-hole are connected.

First claim

What is claimed is:

1 . A functional substrate, comprising: a first dielectric substrate, wherein the first dielectric substrate comprises a first surface and a second surface which are oppositely arranged along a thickness direction of the first dielectric substrate; the first dielectric substrate is provided with a first connection hole; the first connection hole at least penetrates through the first surface; a first connection electrode is arranged in the first connection hole;
the first connection hole comprises a first sub-hole and a second sub-hole which are sequentially arranged along a direction away from the second surface and are communicated with each other; the second sub-hole penetrates through the first surface; an opening width of the second sub-hole is monotonically increased in the direction away from the second surface, and a minimum opening width of the second sub-hole is not smaller than a maximum opening width of the first sub-hole; the first sub-hole and the second sub-hole form a corner at a position where the first sub-hole and the second sub-hole are connected with each other, the functional substrate further comprises a first conductive layer located on the first surface and connected with the first connection electrode; the first connection hole penetrates through the second surface, and the functional substrate further comprises a second conductive layer located on the second surface, and the second conductive layer is connected with the first connection electrode; the functional substrate further comprises an inductor integrated on the first dielectric substrate, the inductor comprises a first sub-structure, a second sub-structure, and a plurality of the first connection electrodes, wherein the first sub-structure is located on the first surface, the second sub-structure is located on the second surface, and the first sub-structure is connected with the second sub-structure through the first connection electrode to form a coil structure of the inductor; and wherein the functional substrate further comprises: a first plate of a capacitor located in the first conductive layer; a first interlayer dielectric layer located on a side of the first conductive layer away from the first dielectric substrate; and a second plate of the capacitor located on a side of the first interlayer dielectric layer away from the first conductive layer.

2 . The functional substrate of claim 1 , wherein the first connection hole penetrates through the first surface and the second surface, the first connection hole further comprises a third sub-hole communicating with the first sub-hole and penetrating through the second surface; an opening width of the third sub-hole is monotonically decreased in the direction away from the second surface, and a minimum opening width of the third sub-hole is not smaller than the maximum opening width of the first sub-hole; and the first sub-hole and the third sub-hole form a corner at a position where the first sub-hole and the third sub-hole are connected with each other.

3 . The functional substrate of claim 1 , wherein the first sub-hole penetrates through the second surface.

4 . The functional substrate of claim 1 , wherein the first sub-hole has an hourglass shape.

5 . The functional substrate of claim 1 , wherein an opening width of the first sub-hole is monotonically increased in the direction away from the second surface.

6 . The functional substrate of claim 1 , wherein the first connection electrode fills the first connection hole or covers only an inner wall of the first connection hole.

7 . The functional substrate of claim 1 , further comprising a second interlayer dielectric layer, a second connection electrode, and a third connection electrode located on a side of the second plate of the capacitor away from the first dielectric substrate;
the second connection electrode is connected with a lead end of the inductor through a second connection hole penetrating through the first interlayer dielectric layer and the second interlayer dielectric layer; the third connection electrode is electrically connected with the second plate of the capacitor through a third connection hole penetrating through the second interlayer dielectric layer.

8 . The functional substrate of claim 1 , further comprising a first protective layer and a first planarization layer sequentially located on a side of a layer, in which the second connection electrode and the third connection electrode are located, away from the first dielectric substrate, and a first connection pad and a second connection pad;
the first connection pad is connected with the second connection electrode through a fourth connection hole, and the second connection pad is connected with the third connection electrode through a fifth connection hole; both the fourth connection hole and the fifth connection hole penetrate through the first protective layer and the first planarization layer.

9 . The functional substrate of claim 1 , further comprising a second protective layer and a second planarization layer sequentially located on a side of the second conductive layer away from the first dielectric substrate.

10 . The functional substrate of claim 1 , wherein the first connection hole penetrates through the second surface;
the functional substrate further comprises: a first conductive layer located on the first surface and a second conductive layer located on the second surface, the first conductive layer and the second conductive layer being connected through the first connection hole; a first buffer layer located between the first conductive layer and the first surface; and a second buffer layer located between the second conductive layer and the second surface.

11 . An electronic device, comprising the functional substrate of claim 1 .

12 . A method for manufacturing a functional substrate, comprising:
providing a first dielectric substrate, the first dielectric substrate comprising a first surface and a second surface which are oppositely arranged along a thickness direction of the first dielectric substrate; forming a first connection hole in the first dielectric substrate, wherein the first connection hole at least penetrates through the first surface; the first connection hole comprises a first sub-hole and a second sub-hole which are sequentially arranged along a direction away from the second surface and are communicated with each other; the second sub-hole penetrates through the first surface; an opening width of the second sub-hole is monotonically increased in the direction away from the second surface, and a minimum opening width of the second sub-hole is not smaller than a maximum opening width of the first sub-hole; the first sub-hole and the second sub-hole form a corner at a position where the first sub-hole and the second sub-hole are connected with each other; and forming a first connection electrode located in the first connection hole, wherein the method further comprises: forming a first conductive layer on the first surface, wherein the first conductive layer is connected with the first connection electrode: forming a second conductive layer on the second surface, wherein the second conductive layer is connected with the first connection electrode; and forming an inductor on the first dielectric substrate, wherein the inductor comprises a first sub-structure, a second sub-structure and a plurality of the first connection electrodes, the first sub-structure is located on the first surface, the second sub-structure is located on the second surface, and the first sub-structure is connected with the second sub-structure through the first connectio

Assignees

• Beijing Boe Optoelectronics Tech Co Ltd
• Boe Technology Group Co Ltd
• Beijing Boe Technology Dev Co Ltd

Inventors

• An Qichang
• Wu Yifan
• Xiao Yuelei
• Li Yue
• Feng Yulin
• Li Huiying
• Li Biqi

Classifications

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H05K2201/1003

  Non-printed inductor · CPC title

• H05K2201/10015

  Non-printed capacitor · CPC title

• H10D86/85

  characterised by only passive components · CPC title

• H05K1/182 Primary

  associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] · CPC title