High-speed optical package with continuous radio frequency (RF) flexible printed circuit

US12520418B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12520418-B2
Application numberUS-202318337572-A
CountryUS
Kind codeB2
Filing dateJun 20, 2023
Priority dateJun 20, 2023
Publication dateJan 6, 2026
Grant dateJan 6, 2026

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  1. Title

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  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Aspects of the subject disclosure may include, for example, a flexible printed circuit (FPC) for interconnecting an optical device and an application specific integrated circuit (ASIC), wherein the FPC includes a first section that is configured with a first plurality of electrically conductive traces and a second section over which one or more components are disposed, and wherein the second section is configured with a second plurality of electrically conductive traces that extend from the first plurality of electrically conductive traces to the one or more components. Other embodiments are disclosed.

First claim

Opening claim text (preview).

What is claimed is: 1 . A system, comprising: an optical device; an application specific integrated circuit (ASIC); and a flexible printed circuit (FPC) for interconnecting the optical device and the ASIC, wherein the FPC includes a first section that is configured with a first plurality of electrically conductive traces, wherein the FPC further includes a second section over which one or more components are disposed, and wherein the second section is configured with a second plurality of electrically conductive traces that extend from the first plurality of electrically conductive traces to the one or more components, the FPC having one or more ground traces and a dielectric support material that span at least a portion of the first section and at least a portion of the second section, the dielectric support material separating the one or more ground traces from the first and second pluralities of electrically conductive traces. 2 . The system of claim 1 , wherein the FPC, when employed as an interconnect between the ASIC and the optical device, decreases a number of solder junctions and/or wire bonds needed for radio frequency (RF) paths between the optical device and the ASIC or eliminates a need for solder junctions and/or wire bonds in RF paths between the optical device and the ASIC. 3 . The system of claim 1 , wherein the optical device comprises a coherent driver modulator (CDM), and wherein the ASIC comprises a transmitter (Tx) ASIC. 4 . The system of claim 3 , wherein the CDM comprises a driver, and wherein the one or more components include the driver, one or more active devices, one or more passive devices, or a combination thereof. 5 . The system of claim 4 , wherein the driver comprises a flip-chip driver. 6 . The system of claim 3 , wherein the CDM comprises a quad parallel Mach-Zehnder (QPMZ) modulator. 7 . The system of claim 1 , wherein the optical device comprises a micro integrated coherent receiver (μICR) that includes a photonic integrated circuit (PIC) and an electronic integrated circuit (EIC) having one or more transimpedance amplifiers (TIAs), and wherein the ASIC comprises a receiver (Rx) ASIC. 8 . The system of claim 7 , wherein the one or more components include the PIC, the EIC, one or more active devices, one or more passive devices, or a combination thereof. 9 . The system of claim 1 , wherein the first section has greater flexibility than the second section. 10 . The system of claim 1 , wherein the second section further comprises a stiffener that functions as a radio frequency (RF) carrier substrate. 11 . The system of claim 10 , wherein the stiffener is composed of a material that provides rigidity for supporting the one or more components. 12 . The system of claim 11 , wherein the material comprises flame retardant epoxy resin and glass fabric composite (FR4), aluminum nitride, or a combination thereof. 13 . The system of claim 1 , wherein the dielectric support material spans an entirety of the second section. 14 . The system of claim 1 , wherein the second section further comprises a plurality of direct current (DC) conductive lines that are separated by at least one dielectric layer. 15 . A flexible printed circuit (FPC) for interconnecting an optical device and an application specific integrated circuit (ASIC), the FPC comprising: a first section that is configured with a first plurality of electrically conductive traces; a second section over which one or more components are disposed, wherein the second section is configured with a second plurality of electrically conductive traces that extend from the first plurality of electrically conductive traces to the one or more components; and one or more ground traces and a dielectric support material that span at least a portion of the first section and at least a portion of the second section, the dielectric support material separating the one or more ground traces from the first and second pluralities of electrically conductive traces. 16 . The FPC of claim 15 , wherein the optical device comprises a coherent driver modulator (CDM), and wherein the ASIC comprises a transmitter (Tx) ASIC. 17 . The FPC of claim 15 , wherein the optical device comprises a micro integrated coherent receiver (μICR) that includes a photonic integrated circuit (PIC) and an electronic integrated circuit (EIC) having one or more transimpedance amplifiers (TIAs), and wherein the ASIC comprises a receiver (Rx) ASIC. 18 . A method, comprising: positioning one or more components over a flexible printed circuit (FPC), wherein the FPC comprises a first section and a second section, wherein the one or more components are positioned over the second section, wherein the first section is configured with a first plurality of electrically conductive traces disposed therein or thereon, and wherein the second section is configured with a second plurality of electrically conductive traces that extend from the first plurality of electrically conductive traces to the one or more components, the FPC having one or more ground traces and a dielectric support material that span at least a portion of the first section and at least a portion of the second section, the dielectric support material separating the one or more ground traces from the first and second pluralities of electrically conductive traces; and interconnecting an optical device and an application specific integrated circuit (ASIC) with the FPC. 19 . The method of claim 18 , wherein the optical device comprises a coherent driver modulator (CDM), and wherein the ASIC comprises a transmitter (Tx) ASIC. 20 . The method of claim 18 , wherein the optical device comprises a micro integrated coherent receiver (μICR) that includes a photonic integrated circuit (PIC) and an electronic integrated circuit (EIC) having one or more transimpedance amplifiers (TIAs), and wherein the ASIC comprises a receiver (Rx) ASIC.

Assignees

Inventors

Classifications

  • High frequency adaptations (H05K1/0216 takes precedence) · CPC title

  • by printed shielding conductors, ground planes or power plane (H05K1/0236 takes precedence) · CPC title

  • the printed circuit boards being flexible (in general H05K1/147) · CPC title

  • Flip chip · CPC title

  • Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance (H05K1/024 and H05K1/0243 take precedence; for semiconductor devices H10W44/20) · CPC title

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Frequently asked questions

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What does patent US12520418B2 cover?
Aspects of the subject disclosure may include, for example, a flexible printed circuit (FPC) for interconnecting an optical device and an application specific integrated circuit (ASIC), wherein the FPC includes a first section that is configured with a first plurality of electrically conductive traces and a second section over which one or more components are disposed, and wherein the second se…
Who is the assignee on this patent?
Ciena Corp
What technology area does this patent fall under?
Primary CPC classification H05K1/0281. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 06 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).