Fast and dynamic vout-tracking control for audio input signal

Patent metadata

Field	Value
Publication number	US-12519459-B2
Application number	US-202318503410-A
Country	US
Kind code	B2
Filing date	Nov 7, 2023
Priority date	Dec 2, 2022
Publication date	Jan 6, 2026
Grant date	Jan 6, 2026

Abstract

A switch circuit includes a first audio input pin configured to receive a first audio signal having a first amplitude, a second audio input pin configured to receive a second audio signal having a second amplitude, an input pin, an output pin, and at least one switch configured to convert the input voltage to the output voltage. When a maximum of the first amplitude and the second amplitude is lower than a first threshold voltage, the output voltage is a default voltage. When the maximum of the first amplitude and the second amplitude is greater than the first threshold voltage but lower a second threshold voltage that is greater than the first threshold voltage, the output voltage is a first voltage greater. When the maximum of the first amplitude and the second amplitude is larger than the second threshold voltage, the output voltage is a second voltage.

First claim

What is claimed is:

1 . A switch circuit, comprising:
a first audio input pin configured to receive a first audio signal having a first amplitude; a second audio input pin configured to receive a second audio signal having a second amplitude; an input pin configured to receive an input voltage; an output pin configured to provide an output voltage; and at least one switch configured to convert the input voltage to the output voltage, wherein the output voltage has a default voltage; a high value selection circuit configured to generate a high value signal according to the first audio signal and the second audio signal, wherein the high value signal has an amplitude that is a maximum of the first amplitude and the second amplitude; wherein when the high value signal increases to be greater than a first threshold voltage but lower than a second threshold voltage that is greater than the first threshold voltage, the output voltage increases to a first voltage that is greater than the default voltage; and when the high value signal increases to be greater than the second threshold voltage, the output voltage increases to a second voltage that is greater than the first voltage.

2 . The switch circuit of claim 1 , wherein the high value selection circuit is further configured to divide a duration of the first audio signal and the second audio signal into multiple time periods, and compare the first amplitude of the first audio signal and the second amplitude of the second audio signal during each time period, and provide the maximum of the first amplitude and the second amplitude in each time period as the high value signal.

3 . The switch circuit of claim 1 , wherein the high value selection circuit comprises:
a first amplitude detection circuit configured to receive the first audio signal from the first audio input pin and generate a first detection signal according to the first audio signal, wherein a phase difference between the first detection signal and the first audio signal is 180°, an amplitude of the first detection signal is proportional to an amplitude of the first audio signal, and an offset of the first detection signal is at a reference voltage; a second amplitude detection circuit configured to receive the first detection signal from the first amplitude detection circuit and generate a second detection signal according to the first detection signal, wherein a phase difference between the second detection signal and the first detection signal is 180°, an amplitude of the second detection signal is proportional to the amplitude of the first detection signal, and an offset of the second detection signal is at the reference voltage; a third amplitude detection circuit configured to receive the second audio signal from the second audio input pin and generate a third detection signal according to the second audio signal, wherein a phase difference between the third detection signal and the second audio signal is 180°, an amplitude of the third detection signal is proportional to an amplitude of the second audio signal, and an offset of the third detection signal is at the reference voltage; a fourth amplitude detection circuit configured to receive the third detection signal from the third amplitude detection circuit and generate a fourth detection signal according to the third detection signal, wherein a phase difference between the fourth detection signal and the third detection signal is 180°, an amplitude of the fourth detection signal is proportional to the amplitude of the third detection signal, and an offset of the fourth detection signal is at the reference voltage; and a comparison circuit configured to receive the first detection signal, the second detection signal, the third detection signal, and the fourth detection signal, compare the first, second, third, and fourth detection signals in multiple time periods, and provide one of the first, second, third, and fourth detection signals with the largest amplitude within each time period as the high value signal.

4 . The switch circuit of claim 3 , wherein each of the first, second, third, and fourth amplitude detection circuits comprises:
an operational amplifier including a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the operational amplifier is configured to receive the reference voltage; and an amplitude adjusting circuit coupled between the second input terminal of the operational amplifier and the output terminal of the operational amplifier.

5 . The switch circuit of claim 4 , wherein the amplitude adjusting circuit comprises:
a first resistor coupled to the second input terminal of the operational amplifier; and a second resistor coupled between the second input terminal of the operational amplifier and the output terminal of the operational amplifier; wherein the amplitude adjusting circuit is configured to adjust a gain of the operational amplifier according to a resistance of the first resistor and a resistance of the second resistor.

6 . The switch circuit of claim 1 , further comprising:
a voltage control circuit, coupled to the high value selection circuit, configured to compare the high value signal with the first and second threshold voltages to provide the output voltage according to the comparison result.

7 . The switch circuit of claim 6 , further comprising:
a feedback pin configured to receive a feedback voltage proportional to the output voltage; wherein the voltage control circuit includes a current source coupled in series with the feedback pin; wherein the current source provides a first current to make the output voltage to the first voltage when the high value signal is larger than the first threshold voltage but lower than the second threshold voltage; and wherein the current source provides a second current to make the output voltage to the second voltage when the high value signal is larger than the second threshold voltage.

8 . The switch circuit of claim 6 , further comprising:
a feedback pin configured to receive a feedback voltage proportional to the output voltage; wherein the voltage control circuit includes:
a first current source, coupled in series with the feedback pin, configured to provide a first current;
a first comparator configured to compare the high value signal with the first threshold voltage, and provide a first control signal in response to the comparison result;
a first switch, coupled between the first current source and the feedback pin, configured to be turned on or turned off in response to the first control signal;
a second current source, coupled in series with the feedback pin, configured to provide a second current;
a second comparator configured to compare the high value signal with the second threshold voltage, and provide a second control signal in response to the comparison result; and
a second switch, coupled between the second current source and the feedback pin, configured to be turned on or turned off in response to the second control signal;
wherein when the first switch is turned on, the first current is provided to the feedback pin to control the output voltage; and
when the second switch is turned on, the second current is provided to the feedback pin to control the output voltage.

9 . The switch circuit of claim 1 , wherein when the high value signal decreases to be lower than the first threshold voltage, the output voltage decreases to the default voltage after a first delay time.

10 . The control circuit of claim 9 , wherein the first delay time is between 1 ms to 10 ms.

11 . The switch circuit of claim 1 , wherein when the high value s

Assignees

• Monolithic Power Systems Inc

Inventors

• Yang Xiangyi
• Li Lei
• Mao Wei
• Liu Panyin
• Wang Li

Classifications

• H03K17/56

  by the use, as active elements, of semiconductor devices (using diodes H03K17/74) · CPC title

• H03K5/02 Primary

  by amplifying (H03K5/04 takes precedence) · CPC title