Undershoot reduction
US-2016299520-A1 · Oct 13, 2016 · US
US12519392B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12519392-B2 |
| Application number | US-202218068144-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 19, 2022 |
| Priority date | Dec 19, 2022 |
| Publication date | Jan 6, 2026 |
| Grant date | Jan 6, 2026 |
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Aspects of a transient control scheme for a multiphase power converter are described. In one example, a power converter system includes a multiphase power converter that includes a plurality of converter phases, with each converter phase comprising a switching transistor and an inductor coupled between an input power source and a load. The power converter system also includes a controller configured to distribute an on-time signal to each converter phase during operation of the multiphase power converter. The controller includes circuitry configured to enable an on-time signal phase overlap between non-subsequent phases of the multiphase power converter when a load current increase is detected during a transient state of the multiphase power converter. The on-time signal phase overlap refers to a simultaneous on-state of two or more switching transistors of the non-subsequent phases during a duration of time within the transient state.
Opening claim text (preview).
Therefore, at least the following is claimed: 1 . A power converter system, comprising: a multiphase power converter comprising a plurality of converter phases, each converter phase comprising a switching transistor and an inductor coupled between an input power source and a load; and a controller configured to distribute an on-time signal to each converter phase during operation of the multiphase power converter, the controller comprising circuitry configured to enable an on-time signal phase overlap between non-subsequent phases of the multiphase power converter when a load current increase is detected during a transient state of the multiphase power converter, the on-time signal phase overlap being a simultaneous on-state of two or more switching transistors of the non-subsequent phases during a duration of time within the transient state. 2 . The power converter system of claim 1 , wherein the plurality of converter phases comprises four converter phases. 3 . The power converter system of claim 1 , wherein the multiphase power converter comprises a multiphase series capacitor buck power converter. 4 . The power converter system of claim 1 , wherein: the controller comprises a clock generator and a comparator circuit; and the comparator circuit is configured to receive a sensed total inductor current of the plurality of converter phases and a compensator voltage from a compensator coupled to the load. 5 . The power converter system of claim 4 , wherein the comparator circuit is configured to compare the compensator voltage and the sensed total inductor current of the plurality of converter phases to generate a comparator clock signal input for the clock generator. 6 . The power converter system of claim 5 , wherein: the controller further comprises a phase manager configured to receive a clock signal from the clock generator; and the phase manager is configured to trigger a plurality of on-time signals for turning on the plurality of converter phases during the transient state based on the clock signal, the plurality of on-time signals being triggered successively in a non-subsequent sequence of the plurality of converter phases. 7 . The power converter system of claim 6 , wherein the non-subsequent sequence comprises turning on even or odd phases of the multiphase power converter first during the transient state operation. 8 . The power converter system of claim 6 , wherein triggering the plurality of on-time signals comprises turning on two or more non-subsequent phases of the multiphase power converter to share the on-time signal phase overlap during the duration of time. 9 . The power converter system of claim 6 , wherein the phase manager comprises a plurality of logic circuits coupled together for generating the plurality of on-time signals and receiving the clock signal, the plurality of logic circuits comprising a plurality of flip-flop circuits. 10 . The power converter system of claim 4 , wherein: the clock generator comprises partial-overlap logic circuitry; and the partial-overlap logic circuitry is configured to prevent the on-time signal phase overlap between subsequent phases of the multiphase power converter based on a set of logic conditions. 11 . The power converter system of claim 10 , wherein the controller is configured to successively distribute the on-time signal to each converter phase during the transient state operation in a non-subsequent sequence, the set of logic conditions determining whether a next phase to be turned on among the plurality of converter phases is a non-subsequent phase of a phase that is already in an on-state. 12 . A power converter system, comprising: a multiphase power converter comprising a plurality of converter phases, each converter phase comprising a switching transistor and an inductor coupled between an input power source and a load; and a controller configured to distribute an on-time signal to each converter phase during operation of the multiphase power converter, the controller comprising circuitry configured to enable an on-time signal phase overlap between non-subsequent phases of the multiphase power converter when a load current increase is detected during a transient state of the multiphase power converter, the on-time signal phase overlap being a simultaneous on-state of two or more switching transistors of the non-subsequent phases during a duration of time within the transient state, wherein the controller comprises a clock generator and a comparator circuit, the comparator circuit being configured to receive a sensed total inductor current of the plurality of converter phases and a compensator voltage from a compensator coupled to the load, the comparator circuit being configured to compare the compensator voltage and the sensed total inductor current to generate a comparator clock signal input for the clock generator. 13 . The power converter system of claim 12 , wherein the multiphase power converter comprises a multiphase series capacitor buck power converter. 14 . The power converter system of claim 12 , wherein the controller further comprises a phase manager configured to receive a clock signal from the clock generator, the phase manager being configured to trigger a plurality of on-time signals for turning on the plurality of converter phases during the transient state based on the clock signal, the plurality of on-time signals being triggered successively in a non-subsequent sequence of the plurality of converter phases. 15 . The power converter system of claim 14 , wherein the non-subsequent sequence comprises turning on even or odd phases of the multiphase power converter first during the transient state operation. 16 . The power converter system of claim 14 , wherein triggering the plurality of on-time signals comprises turning on two or more non-subsequent phases of the multiphase power converter to share the on-time signal phase overlap during the duration of time. 17 . The power converter system of claim 16 , wherein the phase manager comprises a plurality of logic circuits coupled together for generating the plurality of on-time signals and receiving the clock signal, the plurality of logic circuits comprising a plurality of flip-flop circuits. 18 . A power converter system, comprising: a multiphase power converter comprising a plurality of converter phases, each converter phase comprising a switching transistor and an inductor coupled between an input power source and a load; and a controller configured to distribute an on-time signal to each converter phase during operation of the multiphase power converter, the controller comprising circuitry configured to enable an on-time signal phase overlap between non-subsequent phases of the multiphase power converter when a load current increase is detected during a transient state of the multiphase power converter, the on-time signal phase overlap being a simultaneous on-state of two or more switching transistors of the non-subsequent phases during a duration of time within the transient state, wherein the controller comprises a phase manager and a clock generator, the phase manager configured to receive a clock signal from the clock generator, the phase manager being configured to trigger a plurality of on-time signals for turning on the plurality of converter phases during the transient state based on the clock signal, the plurality of on-time signals being triggered successively in a non-subsequent sequence of the plurality of converter phases. 19 . The power con
Converters switched with a phase shift, i.e. interleaved (non-isolated DC/DC converters H02M3/1586) · CPC title
Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck · CPC title
using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title
with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation · CPC title
switched with a phase shift, i.e. interleaved · CPC title
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