Sensing device and manufacturing method thereof
US-2021159151-A1 · May 27, 2021 · US
US12519039B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12519039-B2 |
| Application number | US-202017102546-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 24, 2020 |
| Priority date | Nov 27, 2019 |
| Publication date | Jan 6, 2026 |
| Grant date | Jan 6, 2026 |
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A sensing device includes a sensing chip, which has an active face with a sensing region and a metal pad region having at least a metal pad thereon; a dielectric layer, which covers a periphery, back surface and a part of the active surface of the sensing chip, and the first face of the dielectric layer has an elevation higher than the active face of the sensing chip and exposes the sensing region of the sensing chip; a first conductive wire layer and a second conductive wire layer, which are disposed on the first and second faces of the dielectric layer respectively; a conductive pillar, which is disposed within the dielectric layer and connected to the first and second conductive wire layers; and a front-face fan-out circuit, which is connected to the first conductive wire layer and the metal pad of the sensing chip.
Opening claim text (preview).
What is claimed is: 1 . A sensing device, comprising: a sensing chip, which has an active surface and a back surface oppositely arranged, and the active surface is provided with a sensing region and a metal pad region provided with at least one metal pad thereon; a dielectric layer, which covers a periphery, the back surface, and a part of the active surface of the sensing chip, has a first surface and a second surface oppositely arranged, wherein the first surface has an elevation higher than the active surface of the sensing chip and exposes the sensing region of the sensing chip; a first conductive wire layer, which is disposed on the first surface of the dielectric layer; a second conductive wire layer, which is disposed on the second surface of the dielectric layer; at least a conductive pillar, which is disposed within the dielectric layer and connected to the first conductive wire layer and the second conductive wire layer; and at least a first conductive blind hole pillar, which is connected to the first conductive wire layer and the metal pad of the sensing chip. 2 . The sensing device of claim 1 , further comprises at least a second conductive blind hole pillar, which is disposed in the dielectric layer to connect the back side of the sensing chip and the second conductive wire layer. 3 . The sensing device of claim 1 , further comprises a protective layer, which is disposed on the first surface of the dielectric layer to cover the first conductive wire layer and expose the sensing region. 4 . The sensing device of claim 1 , wherein the metal pad and the metal pad region between the inner side of the metal pad and the sensing region are exposed to the first surface of the dielectric layer, and the metal pad region between the outer side of the metal pad and the edge of the active surface is covered by the dielectric layer. 5 . The sensing device of claim 4 , further comprises at least a back-face fan-out circuit, which is disposed within the dielectric layer to connect the back side of the sensing chip and the second conductive wire layer. 6 . The sensing device of claim 4 , further comprises a protective layer, which is disposed on the first surface of the dielectric layer to cover the first conductive wire layer and expose the sensing region. 7 . The sensing device of claim 4 , wherein the front-face fan-out circuit comprises at least a conductive pillar. 8 . A manufacturing method of a sensing device, comprising: providing a sensing chip with a relatively arranged active surface and a back surface, the active surface is provided with a sensing region and a metal pad region having at least a metal pad thereon; disposing an adhesive layer on the active surface of the sensing chip to cover at least the sensing region; disposing the sensing chip on a carrier through the adhesive layer, of which an upper surface is bonded to the carrier; forming a dielectric layer on the carrier to cover the periphery, the back surface and a part of the active surface of the sensing chip, among which the dielectric layer is provided with relatively arranged a first surface and a second surface, the first surface is bonded to the carrier and is in common plane with the upper surface of the adhesive layer; removing the carrier so that the first surface of the dielectric layer and the upper surface of the adhesive layer are exposed; forming a first conductive wire layer on the first surface of the dielectric layer; forming at least a front-face fan-out circuit between the first conductive wire layer and the metal pad of the sensing chip to connect the first conductive wire layer and the metal pad; forming a second conductive wire layer on the second surface of the dielectric layer; forming at least a conductive pillar between the first conductive wire layer and the second conductive wire layer to connect the first conductive wire layer and the second conductive wire layer; and removing the adhesive layer to expose at least the sensing region of the sensing chip, wherein the first surface of the dielectric layer has an elevation higher than the active surface of the sensing chip. 9 . The manufacturing method of claim 8 , wherein before forming the second conductive wire layer, further comprising: forming at least a blind hole in the dielectric layer to expose a part of the back side of the sensing chip to the second surface; and forming a conductive blind hole pillar in the blind hole by electroplating to form a back-face fan-out circuit to connect the back surface with the second conductive wire layer. 10 . The manufacturing method of claim 8 , wherein forming the front-face fan-out circuit further comprising: forming at least a blind hole in the dielectric layer to expose the metal pad in the metal pad region to the first surface; and forming a conductive blind hole pillar in the blind hole by electroplating to form the front-face fan-out circuit to connect the metal pad with the first conductive wire layer. 11 . The manufacturing method of claim 8 , wherein forming the conductive pillar further comprising: forming at least a via hole in the dielectric layer to connect the first surface and the second surface; and forming the conductive pillar in the via hole by electroplating to connect the first conductive wire layer and the second conductive wire layer. 12 . The manufacturing method of claim 8 , wherein after the adhesive layer is removed, further comprising: forming a protective layer on the first conductive wire layer to cover the first conductive wire layer and the first surface of the dielectric layer, and expose the sensing region of the sensing chip. 13 . The manufacturing method of claim 8 , wherein the adhesive layer further covers the metal pad of the sensing chip and the metal pad region between the inner side of the metal pad and the sensing region, which is removed before the first conductive wire layer is formed so as to expose the sensing region of the sensing chip, the metal pad and the metal pad region between the inner side of the metal pad and the sensing region, and the method for forming the front-face fan-out circuit further comprising: forming the exposed metal pad by electroplating to form the conductive pillar to connect the metal pad with the first conductive wire layer. 14 . The manufacturing method of claim 13 , wherein before forming the second conductive wire layer, further comprising: forming at least a blind hole in the dielectric layer to expose a part of the back side of the sensing chip to the second surface; and forming a conductive blind hole pillar in the blind hole by electroplating to form the back-face fan-out circuit to connect the back surface with the second conductive wire layer. 15 . The manufacturing method of claim 13 , wherein after the first conductive wire layer is formed, further comprising: forming a protective layer on the first conductive wire layer to cover the first conductive wire layer, the front-face fan-out circuit, the first surface of the dielectric layer and the metal pad region between the inner side of the metal pad and the sensing region, and exposing the sensing region of the sensing chip.
Insulating or insulated substrates serving as die pads (H10W70/468 takes precedence) · CPC title
Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title
Through-vias · CPC title
using temporary auxiliary substrates (H10W74/017 takes precedence) · CPC title
of vias therein · CPC title
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