Video display device
US-2018240420-A1 · Aug 23, 2018 · US
Electronic device
US12518658B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12518658-B2 |
| Application number | US-202418983393-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 17, 2024 |
| Priority date | Apr 19, 2018 |
| Publication date | Jan 6, 2026 |
| Grant date | Jan 6, 2026 |
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- Title
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- Abstract
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- Assignees and inventors
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- Key dates
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- First independent claim
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- CPC / IPC classifications
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- Citations and related patents
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Abstract
Official abstract text for this publication.
An electronic device is provided and includes a substrate, a first bump, a second bump, and an electronic element. The substrate includes a first through hole and a second through hole disposed adjacent to the first through hole along a direction. The first bump and the second bump are overlapped with the substrate, wherein the first bump is adjacent to the second bump along the direction. The electronic element is overlapped with the substrate and electrically connected to the first bump, wherein the substrate is disposed between the first bump and the electronic element. A distance between the first through hole and the second through hole of the substrate along the direction is different from a distance between the first bump and the second bump along the direction.
First claim
Opening claim text (preview).
What is claimed is: 1 . An electronic device, comprising: a substrate comprising a first through hole and a second through hole disposed adjacent to the first through hole along a direction; a first bump and a second bump overlapped with the substrate, wherein the first bump is adjacent to the second bump along the direction; an electronic element overlapped with the substrate and electrically connected to the first bump, wherein the substrate is disposed between the first bump and the electronic element; and a circuit layer, wherein the substrate is disposed between the electronic element and the circuit layer, the circuit layer comprises a plurality of microstructures, and two of the plurality of microstructures are the first bump and the second bump, wherein a distance between the first through hole and the second through hole of the substrate along the direction is different from a distance between the first bump and the second bump along the direction. 2 . The electronic device as claimed in claim 1 , wherein the substrate further comprises a third through hole disposed adjacent to the second through hole along the direction, the second through hole is disposed between the first through hole and the third through hole along the direction, and the distance between the first through hole and the second through hole is different from a distance between the second through hole and the third through hole. 3 . The electronic device as claimed in claim 2 , wherein the distance between the first through hole and the second through hole is less than the distance between the second through hole and the third through hole. 4 . The electronic device as claimed in claim 3 , wherein the first bump is overlapped with the third through hole. 5 . The electronic device as claimed in claim 4 , wherein the distance between the first through hole and the second through hole of the substrate is less than the distance between the first bump and the second bump.
Assignees
Inventors
Classifications
Package configurations · CPC title
Active-matrix LED displays · CPC title
Package substrates, e.g. submounts · CPC title
Interconnections (of active-matrix LED displays H10H29/49) · CPC title
- H05K1/028Primary
Bending or folding regions of flexible printed circuits (H05K1/0283 takes precedence) · CPC title
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Frequently asked questions
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- What does patent US12518658B2 cover?
- An electronic device is provided and includes a substrate, a first bump, a second bump, and an electronic element. The substrate includes a first through hole and a second through hole disposed adjacent to the first through hole along a direction. The first bump and the second bump are overlapped with the substrate, wherein the first bump is adjacent to the second bump along the direction. The …
- Who is the assignee on this patent?
- Innolux Corp
- What technology area does this patent fall under?
- Primary CPC classification H05K1/028. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 06 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).