Device cache engine for a cache-coherent interconnect memory expansion
US-2024311049-A1 · Sep 19, 2024 · US
US12517672B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-12517672-B1 |
| Application number | US-202418926933-A |
| Country | US |
| Kind code | B1 |
| Filing date | Oct 25, 2024 |
| Priority date | Oct 25, 2024 |
| Publication date | Jan 6, 2026 |
| Grant date | Jan 6, 2026 |
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A method for use in a storage system, comprising: detecting that a backend track is required to be deleted, the backend track currently being in an allocated state; identifying a repetition probability score for data that is stored in the backend track; detecting whether the repetition probability score satisfies a predetermined condition; when the predetermined condition is satisfied, transitioning the backend track from an allocated state into a delayed release state, removing any associations between the backend track and one or more frontend tracks, waiting for a predetermined waiting period, and transitioning the backend track from the delayed release state into a free state, wherein the backend track is transitioned into the free state only if no write requests are received at the storage system which include user data matching the data that is currently stored in the backend track.
Opening claim text (preview).
The invention claimed is: 1 . A method for use in a storage system, comprising: detecting that a backend track is required to be deleted, the backend track currently being in an allocated state; identifying a repetition probability score for data that is stored in the backend track; detecting whether the repetition probability score satisfies a predetermined condition; when the predetermined condition is satisfied, transitioning the backend track from an allocated state into a delayed release state, removing any associations between the backend track and one or more frontend tracks, waiting for a predetermined waiting period, and transitioning the backend track from the delayed release state into a free state, wherein the backend track is transitioned into the free state only if no write requests are received at the storage system which include user data matching the data that is currently stored in the backend track; when the predetermined condition is not satisfied, removing any associations between the backend track and one or more frontend tracks, and transitioning the backend track from the allocated state directly into the free state. 2 . The method of claim 1 , further comprising: obtaining a data block that is associated with one or more pending write requests; detecting whether the data block matches the data that is stored in the backend track; and when the data block matches the data that is stored in the backend track, transitioning the backend track from the delayed release state back into the allocated state and associating the backend track with a frontend track that corresponds to the data block. 3 . The method of claim 2 , wherein detecting whether the data block matches the data that is stored in the backend track includes comparing a fingerprint for the data block with a fingerprint for the data that is stored in the backend track. 4 . The method of claim 1 , wherein the repetition probability score is generated by a machine learning model. 5 . The method of claim 4 , wherein the machine learning model includes an autoregressive integrated moving average (ARIMA) model. 6 . The method of claim 1 , further comprising storing in a memory of the storage system a data structure that includes an identifier of the backend track, a fingerprint of data that is currently present in the backend track, and the repetition probability score, wherein the repetition probability score is retrieved from the data structure. 7 . The method of claim 1 , wherein the predetermined condition is satisfied when the repetition probability score is greater than a predetermined percentage of a plurality of repetition probability scores. 8 . A system, comprising: a memory; and at least one processor that is operatively coupled to the memory, the at least one processor being configured to perform the operations of: detecting that a backend track is required to be deleted, the backend track currently being in an allocated state; identifying a repetition probability score for data that is stored in the backend track; detecting whether the repetition probability score satisfies a predetermined condition; when the predetermined condition is satisfied, transitioning the backend track from an allocated state into a delayed release state, removing any associations between the backend track and one or more frontend tracks, waiting for a predetermined waiting period, and transitioning the backend track from the delayed release state into a free state, wherein the backend track is transitioned into the free state only if no write requests are received at a storage system which include user data matching the data that is currently stored in the backend track; when the predetermined condition is not satisfied, removing any associations between the backend track and one or more frontend tracks, and transitioning the backend track from the allocated state directly into the free state. 9 . The system of claim 8 , wherein the at least one processor is further configured to perform the operations of: obtaining a data block that is associated with one or more pending write requests; detecting whether the data block matches the data that is stored in the backend track; and when the data block matches the data that is stored in the backend track, transitioning the backend track from the delayed release state back into the allocated state and associating the backend track with a frontend track that corresponds to the data block. 10 . The system of claim 9 , wherein detecting whether the data block matches the data that is stored in the backend track includes comparing a fingerprint for the data block with a fingerprint for the data that is stored in the backend track. 11 . The system of claim 8 , wherein the repetition probability score is generated by a machine learning model. 12 . The system of claim 11 , wherein the machine learning model includes an autoregressive integrated moving average (ARIMA) model. 13 . The system of claim 8 , wherein the memory is configured to store a data structure that includes an identifier of the backend track, a fingerprint of data that is currently present in the backend track, and the repetition probability score, and the repetition probability score is retrieved from the data structure. 14 . The system of claim 8 , wherein the predetermined condition is satisfied when the repetition probability score is greater than a predetermined percentage of a plurality of repetition probability scores. 15 . A non-transitory computer-readable medium storing one or more processor-executable instructions, which, when executed by at least one processor of a storage system, cause the at least one processor to perform the operations of: detecting that a backend track is required to be deleted, the backend track currently being in an allocated state; identifying a repetition probability score for data that is stored in the backend track; detecting whether the repetition probability score satisfies a predetermined condition; when the predetermined condition is satisfied, transitioning the backend track from an allocated state into a delayed release state, removing any associations between the backend track and one or more frontend tracks, waiting for a predetermined waiting period, and transitioning the backend track from the delayed release state into a free state, wherein the backend track is transitioned into the free state only if no write requests are received at the storage system which include user data matching the data that is currently stored in the backend track; when the predetermined condition is not satisfied, removing any associations between the backend track and one or more frontend tracks, and transitioning the backend track from the allocated state directly into the free state. 16 . The non-transitory computer-readable medium of claim 15 , wherein the one or more processor-executable instructions, when executed by the at least one processor, further cause the at least one processor to perform the operations of: obtaining a data block that is associated with one or more pending write requests; detecting whether the data block matches the data that is stored in the backend track; and when the data block matches the data that is stored in the backend track, transitioning the backend track from the delayed release state back into the allocated state and associating the backend track with a frontend track that corresponds to the data block. 17 . The non-transitory computer-readable medium of claim 16 , wherein detectin
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