Override mechanism for PWM operation

Patent metadata

Field	Value
Publication number	US-12512822-B2
Application number	US-202418432347-A
Country	US
Kind code	B2
Filing date	Feb 5, 2024
Priority date	Feb 9, 2023
Publication date	Dec 30, 2025
Grant date	Dec 30, 2025

Abstract

An apparatus includes a pulsed-width modulation (PWM) generator circuit to generate generally complementary PWM signals. The signals are to prevent two complementary switches that receive the complementary PWM signals from both being activated at a same time. The PWM signals are generally complementary with respect to their active portions. The apparatus includes an override circuit to override at least one of the complementary PWM signals to yield adjusted PWM signals. The adjusted PWM signals are to cause the two complementary switches to be activated at a same time when the adjusted PWM signals are received at the two complementary switches.

First claim

The invention claimed is:

1 . An apparatus, comprising:
a pulsed-width modulation (PWM) generator circuit to generate generally complementary PWM signals, the signals to prevent two complementary switches that receive the complementary PWM signals from both being activated at a same time, the PWM signals being generally complementary with respect to their active portions; and an override circuit to override at least one of the complementary PWM signals to yield adjusted PWM signals, the adjusted PWM signals to cause the two complementary switches to be activated at a same time when the adjusted PWM signals are received at the two complementary switches.

2 . The apparatus of claim 1 , wherein the override circuit is to override the complementary PWM signals to yield the adjusted PWM signals based on a software override.

3 . The apparatus of claim 1 , wherein the override circuit is to override the complementary PWM signals to yield the adjusted PWM signals to activate both of the two complementary switches to charge a flying capacitor connected between the two complementary switches.

4 . The apparatus of claim 1 , wherein the override circuit is to override the complementary PWM signals to yield the adjusted PWM signals to activate both of the two complementary switches to discharge a flying capacitor connected between the two complementary switches.

5 . The apparatus of claim 1 , wherein the override circuit is to override the complementary PWM signals to yield the adjusted PWM signals to activate both of the two complementary switches to actively compensate voltage of a flying capacitor connected between the two complementary switches.

6 . The apparatus of claim 5 , wherein the override circuit is to actively compensate voltage of the flying capacitor connected between the two complementary switches by shortening a centering startup voltage of the flying capacitor.

7 . The apparatus of claim 1 , wherein the override circuit is to bypass dead-time compensation to generate at least one of the complementary PWM signals.

8 . The apparatus of claim 1 , wherein the override circuit is to override a single one of the complementary PWM signals to yield the adjusted PWM signals.

9 . The apparatus of claim 1 , wherein the override circuit is to override one of the complementary PWM signals with a predefined value to yield the adjusted PWM signals.

10 . A method, comprising:
generating generally complementary pulsed-width modulation (PWM) signals, the PWM signals being generally complementary with respect to their active portions, the complementary PWM signals to prevent two complementary switches that receive the complementary PWM signals from both being activated at a same time; and overriding at least one of the complementary PWM signals to yield adjusted PWM signals, the second adjusted PWM signals to cause the two complementary switches to be activated at a same time when the second adjusted PWM signals are received.

11 . The method of claim 10 , wherein overriding the complementary PWM signals to yield the adjusted PWM signals is based on a software override.

12 . The method of claim 10 , wherein overriding the complementary PWM signals to yield the adjusted PWM signals is to activate both of the two complementary switches to charge a flying capacitor connected between the two complementary switches.

13 . The method of claim 10 , wherein overriding the complementary PWM signals to yield the adjusted PWM signals is to activate both of the two complementary switches to discharge a flying capacitor connected between the two complementary switches.

14 . The method of claim 10 , wherein overriding the complementary PWM signals to yield the adjusted PWM signals is to activate both of the two complementary switches to actively compensate voltage of a flying capacitor connected between the two complementary switches.

15 . The method of claim 14 , comprising shortening a centering startup voltage of the flying capacitor to actively compensate voltage of the flying capacitor connected between the two complementary switches.

16 . The method of claim 10 , comprising bypassing dead-time compensation to generate the complementary PWM signals to yield the adjusted PWM signals.

17 . The method of claim 10 , comprising overriding a single one of the complementary PWM signals to yield the adjusted PWM signals.

18 . The method of claim 10 , comprising overriding one of the complementary PWM signals with a predefined value to yield the adjusted PWM signals.

19 . A system, comprising:
a pulsed-width modulation (PWM) generator circuit to generate a first PWM signal and a second PWM signal, the first and second PWM signals to be generally complementary to each other with respect to their active portions; an output circuit to output a first output PWM signal and a second output PWM signal; and an override circuit to select between a first override value or a first adjusted PWM signal to provide to the output circuit; wherein the output circuit is to output the first output PWM signal based upon the first adjusted PWM signal based upon a selected one of the first override value or the first adjusted PWM signal from the override circuit.

20 . The system of claim 19 , wherein the override circuit is to turn off an addition of deadtime to the first PWM signal based on a determination to select the first override value to be provided to the output circuit.

Assignees

• Microchip Tech Inc

Inventors

• Yuenyongsgool Yong
• Reiter Andreas
• Bowling Stephen
• Sachs Jason

Classifications

• H03K5/151

  with two complementary outputs · CPC title

• H03K3/017 Primary

  Adjustment of width or dutycycle of pulses (pulse width modulation H03K7/08 {; to maintain energy constant H03K3/015}) · CPC title