Circuit arrangement for current limiting and electrical system

Patent metadata

Field	Value
Publication number	US-12512666-B2
Application number	US-202318313653-A
Country	US
Kind code	B2
Filing date	May 8, 2023
Priority date	May 11, 2022
Publication date	Dec 30, 2025
Grant date	Dec 30, 2025

Abstract

A circuit arrangement for current limiting and an electrical system comprising such a circuit arrangement. An output terminal of a current limiting control circuit is connected to a control input of a semiconductor switch via a limiting resistor (RB). The current limiting control circuit is configured to change an output impedance of the current limiting control circuit at the output terminal. The semiconductor switch is configured to set a current (I) in a circuit between an electrical power source and a load. An inductor (L) is configured to be connected to the electrical power source and to a terminal of the load and an input of the current limiting control circuit is connected to the inductor (L). The current limiting control circuit is configured to detect an overcurrent-related voltage drop (VL) of the inductor (L) and reduce its output impedance to increase an output impedance of the semiconductor switch.

First claim

The invention claimed is:

1 . A circuit arrangement ( 5 ) for current limiting, the circuit comprising:
an inductor (L), a limiting resistor (RB), a gate resistor (RG), a current limiting control circuit ( 10 ), a semiconductor switch ( 20 ), and a gate driver ( 25 ), wherein
an output terminal ( 12 ) of the current limiting control circuit ( 10 ) is connected to a control input ( 22 ) of the semiconductor switch ( 20 ) via the limiting resistor (RB), wherein the output terminal ( 12 ) is connected between the control input ( 22 ) of the semiconductor switch ( 20 ) and the gate resistor (RG),
the gate driver ( 25 ) is connected via the gate resistor (RG) to the control input ( 22 ) of the semiconductor switch ( 20 ) and to the limiting resistor (RB) and is configured to control the semiconductor switch ( 20 ) to open and close,
the current limiting control circuit ( 10 ) is configured to change an output impedance of the current limiting control circuit ( 10 ) at the output terminal ( 12 ) in order to control the semiconductor switch ( 20 ),
the semiconductor switch ( 20 ) is configured to set a current (I) in a circuit between an electrical power source ( 30 ) and a load ( 40 ) as a function of a control by the current limiting control circuit ( 10 ),
the inductor (L) is configured to be directly or indirectly connected to a terminal ( 32 ) of the electrical power source ( 30 ) via a first terminal (L 1 ) and directly or indirectly connected to a terminal ( 42 ) of the load ( 40 ) via a second terminal (L 2 ),
a first input terminal ( 14 ) of the current limiting control circuit ( 10 ) is electrically connected to the first terminal (L 1 ) of the inductor (L) and a second input terminal ( 16 ) of the current limiting control circuit ( 10 ) is electrically connected to the second terminal (L 2 ) of the inductor (L), and
the current limiting control circuit ( 10 ) is configured to detect an overcurrent-related voltage drop (VL) of the inductor (L) and in response reduce its output impedance in order to thus increase an output impedance of the semiconductor switch ( 20 ) on the basis of a voltage drop across the limiting resistor (RB), so that the increased output impedance in the semiconductor switch ( 20 ) counteracts the overcurrent; and
wherein the circuit arrangement ( 5 ) is configured to return the increased output impedance to an original value prior to the occurrence of the overcurrent after a predefined period of time when the voltage drop (VL) across the inductor (L) is reduced.

2 . The circuit arrangement ( 5 ) according to claim 1 , wherein
the semiconductor switch ( 20 ) is at least one selected from the group consisting of a power semiconductor switch, a MOSFET, an IGBT or a JFET, a Si, a SiC or a GaN-based semiconductor switch ( 20 ), a topological semiconductor switch ( 20 ) formed of a plurality of parallel connected individual semiconductor switches, and an analog circuit.

3 . The circuit arrangement ( 5 ) according to claim 1 , wherein the inductor (L) is at least one selected from the group consisting of
a parasitic inductor, a discrete component, a coil, a shunt resistor, a line section of the circuit, a busbar, a conductor track of a printed circuit board, and a transformer.

4 . The circuit arrangement ( 5 ) according to claim 1 , wherein the circuit arrangement ( 5 ) is configured to
permanently maintain the increased output impedance of the semiconductor switch ( 20 ).

5 . The circuit arrangement ( 5 ) according to claim 1 , wherein
the circuit arrangement ( 5 ) comprises
a diode (D 1 ) is connected between the second terminal (L 2 ) of the inductor (L) and the second input terminal ( 16 ) of the current limiting control circuit ( 10 ).

6 . The circuit arrangement ( 5 ) according to claim 1 , wherein the circuit arrangement ( 5 ) is configured to completely prevent a current flow (I) through the semiconductor switch ( 10 ) if a predefined first voltage threshold is exceeded by the voltage drop (VL) across the inductor (L).

7 . The circuit arrangement ( 5 ) according to claim 1 , wherein
the limiting resistor (RB) is replaced with a Zener diode, and/or the current limiting control circuit ( 10 ) is configured on the basis of a voltage of a transistor, the output impedance of which is adjusted in the event of an overcurrent.

8 . The circuit arrangement ( 5 ) according to claim 6 , wherein the circuit arrangement ( 5 ) is configured to reduce the output impedance of the current limiting control circuit ( 10 ) only when the voltage drop (VL) across the inductor (L) exceeds a predefined second voltage threshold.

9 . The circuit arrangement ( 5 ) according to claim 1 , wherein
the electrical power source ( 30 ) is a drive battery for an electrically driven vehicle, and/or the load ( 40 ) is an inverter for a drive train of a vehicle, and/or the load ( 40 ) is connected in parallel with an intermediate circuit capacitor (CL).

10 . An electrical system comprising
a circuit arrangement ( 5 ) according to claim 1 , an electrical power source ( 30 ), a load ( 40 ), and a vehicle electrical system ( 80 ) for a vehicle, wherein the vehicle electrical system ( 80 ) is configured to transmit electrical power from the electrical power source ( 30 ) to the load ( 40 ), and the circuit arrangement ( 5 ) is configured to reduce a current (I) between the load ( 40 ) and the electrical power source ( 30 ) by means of a control of the semiconductor switch ( 20 ) if a current (I) flowing through the vehicle electrical system ( 80 ) corresponds to an overcurrent.

11 . The circuit arrangement ( 5 ) according to claim 1 , wherein the gate resistor (RG) is connected to the limiting resistor (RB).

12 . The circuit arrangement ( 5 ) according to claim 11 , wherein the circuit arrangement ( 5 ) comprises a diode (D 3 ), and wherein the gate resistor (RG) is connected to the limiting resistor (RB) via the diode (D 3 ).

13 . A circuit arrangement ( 5 ) for current limiting, the circuit comprising:
an inductor (L), a limiting resistor (RB), a gate resistor (RG), a current limiting control circuit ( 10 ), a semiconductor switch ( 20 ), and a gate driver ( 25 ), wherein
an output terminal ( 12 ) of the current limiting control circuit ( 10 ) is connected to a control input ( 22 ) of the semiconductor switch ( 20 ) via the limiting resistor (RB), wherein the output terminal ( 12 ) is connected between the control input ( 22 ) of the semiconductor switch ( 20 ) and the gate resistor (RG),
the gate driver ( 25 ) is connected via the gate resistor (RG) to the control input ( 22 ) of the semiconductor switch ( 20 ) and to the limiting resistor (RB) and is configured to control the semiconductor switch ( 20 ) to open and close,
the current limiting control circuit ( 10 ) is configured to change an output impedance of the current limiting control circuit ( 10 ) at the output terminal ( 12 ) in order to control the semiconductor switch ( 20 ),
the semiconductor switch ( 20 ) is configured to set a current (I) in a circuit between an electrical power source ( 30 ) and a load ( 40 ) as a function of a control by the current limiting control circuit ( 10 ),
the inductor (L) is configured to be directly or indirectly connected to a terminal ( 32 ) of the electrical power source ( 30 ) via a first terminal (L 1 ) and directly or indirectly connected to a terminal ( 42 ) of the load ( 40 ) via a second terminal (L 2 ),
a first input terminal ( 14 ) of the current limiting control circuit ( 10 ) is electrically connected to the first terminal (L 1 ) of the inductor (L) an

Assignees

• Bosch Gmbh Robert

Inventors

• Wolf Mathis

Classifications

• B60L3/003

  relating to inverters · CPC title

• B60L2240/549

  Current · CPC title

• B60L3/0046

  relating to electric energy storage systems, e.g. batteries or capacitors · CPC title

• B60L3/04

  Cutting off the power supply under fault conditions (protective devices and circuit arrangements in general H01H; H02H) · CPC title

• B60L3/0069

  relating to the isolation, e.g. ground fault or leak current · CPC title