Display device and driving tool

US12507530B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12507530-B2
Application numberUS-202318578166-A
CountryUS
Kind codeB2
Filing dateApr 3, 2023
Priority dateApr 3, 2023
Publication dateDec 23, 2025
Grant dateDec 23, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes a substrate and a plurality of sub-pixels arranged in an array on the substrate, and each of the plurality of sub-pixels includes: a drive unit including a driving transistor and a storage capacitor that are electrically connected; light-emitting devices including a pixel opening region, an orthographic projection of the pixel opening region on the substrate and an orthographic projection of the driving transistor on the substrate are at least partially non overlapping, and the orthographic projection of the pixel opening region on the substrate and an orthographic projection of the storage capacitor on the substrate are at least partially non overlapping; wherein the display device is configured as that, after continuously displaying a white picture at room temperature for two hours, a temperature rise of a display surface of the display device is less than or equal to 15° C.

First claim

Opening claim text (preview).

The invention claimed is: 1 . A display device comprising a substrate and a plurality of sub-pixels arranged in an array on the substrate, wherein each of the plurality of sub-pixels comprises: a drive unit located at one side of the substrate, wherein the drive unit comprises a driving transistor and a storage capacitor that are electrically connected; and light-emitting devices electrically connected to the drive unit, wherein each of the light-emitting devices comprises a pixel opening region, an orthographic projection of the pixel opening region on the substrate and an orthographic projection of the driving transistor on the substrate are at least partially non overlapping, and the orthographic projection of the pixel opening region on the substrate and an orthographic projection of the storage capacitor on the substrate are at least partially non overlapping, wherein the display device is configured as that, after continuously displaying a white picture at room temperature for two hours, a temperature rise of a display surface of the display device is less than or equal to 15° C., wherein a luminance of a light source of the display device is greater than or equal to 500 nit, wherein the light-emitting devices comprise a plurality of light-emitting device groups, and each of the plurality of light-emitting device groups comprises a first light-emitting device, a second light-emitting device and a third light-emitting device, and wherein a ratio range of areas of the pixel opening regions of the first light-emitting device, the second light-emitting device and the third light-emitting device is (1):(1˜2.5):(1.5˜3.5). 2 . The display device according to claim 1 , wherein the driving transistor comprises an active layer, and the orthographic projection of the pixel opening region on the substrate and an orthographic projection of the active layer of the driving transistor on the substrate are at least partially non overlapping. 3 . The display device according to claim 1 , wherein the driving transistor comprises a gate, and the orthographic projection of the pixel opening region on the substrate and an orthographic projection of the gate of the driving transistor on the substrate are at least partially non overlapping. 4 . The display device according to claim 3 , wherein the first light-emitting device and the second light-emitting device are located in the same row and are arranged alternately, and a shape formed by connecting lines of geometric centers of the pixel opening regions of the first light-emitting device, the second light-emitting device and the third light-emitting device is a triangle; or the first light-emitting device, the second light-emitting device and the third light-emitting device are arranged in sequence and are located in the same row, the pixel opening region of the second light-emitting device comprises two parts that are not connected, the geometric centers of the pixel opening regions of the first light-emitting device, the second light-emitting device and the third light-emitting device are collinear. 5 . The display device according to claim 4 , wherein the orthographic projection of the pixel opening region of the light-emitting device on the substrate and the orthographic projection of the gate of the driving transistor on the substrate are roughly non overlapping. 6 . The display device according to claim 5 , wherein a plurality of light-emitting device groups extending along a first direction form a row, the gates of the driving transistors are all located between two adjacent rows of the light-emitting device groups, an arrangement direction of the gates of the driving transistors electrically connected to the light-emitting device groups of the same row is consistent with the first direction. 7 . The display device according to claim 5 , wherein under the condition that the first light-emitting device and the second light-emitting device are located in the same row and are arranged alternately, a range of a percentage of an area of a region, where the orthographic projection of the pixel opening region of the light-emitting device on the substrate overlaps with an orthographic projection of other regions of the driving transistor except for the gate on the substrate, to an area of the pixel opening region is 17%˜37%; a range of a percentage of an area of a region, where the orthographic projection of the pixel opening region of the light-emitting device on the substrate overlaps with an orthographic projection of the storage capacitor on the substrate, to the area of the pixel opening region is 17%˜37%. 8 . The display device according to claim 5 , wherein under the condition that the first light-emitting device, the second light-emitting device and the third light-emitting device are arranged in sequence and are located in the same row, and the pixel opening region of the second light-emitting device comprises two parts that are not connected, a range of a percentage of an area of a region, where the orthographic projection of the pixel opening region of the light-emitting device on the substrate overlaps with an orthographic projection of other regions of the driving transistor except for the gate on the substrate, to an area of the pixel opening region is 24%˜44%; a range of a percentage of an area of a region, where the orthographic projection of the pixel opening region of the light-emitting device on the substrate overlaps with an orthographic projection of the storage capacitor on the substrate, to the area of the pixel opening region is 24%˜44%. 9 . The display device according to claim 4 , wherein the orthographic projections of the pixel opening regions of a part of the light-emitting devices on the substrate partially overlap with the orthographic projection of the gate of the driving transistor on the substrate, and the orthographic projections of the pixel opening regions of another part of the light-emitting devices on the substrate and the orthographic projection of the gate of the driving transistor on the substrate are roughly non overlapping. 10 . The display device according to claim 9 , wherein under the condition that the first light-emitting device and the second light-emitting device are located in the same row and are arranged alternately, an orthographic projection of the pixel opening region of the third light-emitting device on the substrate partially overlaps with the orthographic projection of the gate of the driving transistor on the substrate, and the orthographic projections of the pixel opening regions of the first light-emitting device and the second light-emitting device on the substrate and the orthographic projection of the gate of the driving transistor on the substrate are roughly non overlapping; the orthographic projection of the gates of a part of the driving transistors on the substrate are located in a region between the orthographic projections of the pixel opening regions of the first light-emitting device and the second light-emitting device on the substrate. 11 . The display device according to claim 9 , wherein under the condition that the first light-emitting device, the second light-emitting device and the third light-emitting device are arranged in sequence and are located in the same row, and the pixel opening region of the second light-emitting device comprises two parts that are not connected, an orthographic projection of the pixel opening region of the third light-emitting device on the substrate partially overlaps with the orthographic projection of the gate of the driving transistor on the substrate, an orthographic projection of the pixel opening region of the first light

Assignees

Inventors

Classifications

  • Preventing or counteracting the effects of ageing · CPC title

  • Temperature compensation · CPC title

  • forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

  • with pixel circuitry controlling the current through the light-emitting element · CPC title

  • Active-matrix OLED [AMOLED] displays · CPC title

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Frequently asked questions

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What does patent US12507530B2 cover?
A display device includes a substrate and a plurality of sub-pixels arranged in an array on the substrate, and each of the plurality of sub-pixels includes: a drive unit including a driving transistor and a storage capacitor that are electrically connected; light-emitting devices including a pixel opening region, an orthographic projection of the pixel opening region on the substrate and an ort…
Who is the assignee on this patent?
Chongqing Boe Display Tech Co Ltd, Boe Technology Group Co Ltd, Beijing Boe Technology Dev Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/1213. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 23 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).