Electroluminescent display device including a buffer layer disposed on a passivation layer or a planarization layer in GIP area

Patent metadata

Field	Value
Publication number	US-12507529-B2
Application number	US-202217944938-A
Country	US
Kind code	B2
Filing date	Sep 14, 2022
Priority date	Dec 20, 2021
Publication date	Dec 23, 2025
Grant date	Dec 23, 2025

Abstract

An electroluminescent display device according to an exemplary embodiment of the present disclosure may include a substrate including an active area and a non-active area having a gate in panel (GIP) area outside the active area, an oxide thin film transistor disposed on the substrate in the GIP area, a passivation layer disposed on the oxide thin film transistor, a planarization layer disposed on the passivation layer, a buffer layer disposed on the passivation layer or the planarization layer in the GIP area and made of silicon nitride and a light emitting element disposed on the planarization layer and including an anode, a light emitting unit, and a cathode. As a result, by preventing hydrogen inflow into an oxide thin film transistor, characteristics and reliability of the thin film transistor can be improved.

First claim

What is claimed is:

1 . An electroluminescent display device, comprising:
a substrate including an active area and a non-active area having a gate in panel (GIP) area outside the active area; an oxide thin film transistor disposed on the substrate in the GIP area; a passivation layer disposed on the oxide thin film transistor; a planarization layer disposed on the passivation layer; a buffer layer disposed on the passivation layer or the planarization layer in the GIP area and made of silicon nitride; and a light emitting element disposed on the planarization layer and including an anode, a light emitting unit, and a cathode.

2 . The electroluminescent display device of claim 1 , wherein the buffer layer is disposed only in the GIP area other than the active area.

3 . The electroluminescent display device of claim 1 , wherein the passivation layer is made of silicon oxide.

4 . The electroluminescent display device of claim 3 , wherein the planarization layer is made of one or more materials among acrylic resin, epoxy resin, phenolic resin, polyamides resin, polyimides resin, unsaturated polyesters resin, polyphenylene sulfides resin, polyphenylene resin, and benzocyclobutene.

5 . The electroluminescent display device of claim 2 , wherein the buffer layer is disposed to surround a perimeter of the active area.

6 . The electroluminescent display device of claim 1 , wherein an edge of the light emitting unit is positioned in the GIP area, and
wherein the buffer layer is disposed in the GIP area including a mark due to mask pressing occurring in an edge perimeter of the light emitting unit.

7 . The electroluminescent display device of claim 1 , further comprising: a hydrogen adsorption layer disposed on the buffer layer.

8 . The electroluminescent display device of claim 7 , wherein the hydrogen adsorption layer is disposed on the buffer layer to cover the buffer layer.

9 . The electroluminescent display device of claim 7 , wherein the hydrogen adsorption layer is disposed to surround a perimeter of the active area.

10 . The electroluminescent display device of claim 7 , wherein the hydrogen adsorption layer is made of one or more of Ti, Sc, V, Mn, Fe, Pd, Nb, Zr, Y, Ta, Ce, La, Sm, and U.

11 . The electroluminescent display device of claim 7 , wherein the buffer layer is disposed to protrude from an end of the hydrogen adsorption layer.

12 . An electroluminescent display device, comprising:
a substrate including an active area and a non-active area having a gate in panel (GIP) area outside the active area; an oxide thin film transistor disposed on the substrate in the GIP area; a passivation layer disposed on the oxide thin film transistor; a planarization layer disposed on the passivation layer; a buffer layer disposed on the passivation layer or the planarization layer; a light emitting element disposed on the planarization layer and including an anode, a light emitting unit, and a cathode; and an encapsulation layer disposed on the light emitting element, wherein the buffer layer is made of silicon nitride and disposed in the GIP area to thereby block diffusion of external hydrogen or hydrogen in the encapsulation layer into the oxide thin film transistor therebelow.

13 . The electroluminescent display device of claim 12 , wherein the buffer layer is disposed only in the GIP area other than the active area.

14 . The electroluminescent display device of claim 12 , further comprising: a hydrogen adsorption layer disposed on the buffer layer,
wherein the hydrogen adsorption layer is made of one or more of Ti, Sc, V, Mn, Fe, Pd, Nb, Zr, Y, Ta, Ce, La, Sm, and U.

15 . The electroluminescent display device of claim 14 , wherein the buffer layer and the hydrogen adsorption layer are disposed to surround a perimeter of the active area.

16 . The electroluminescent display device of claim 1 , wherein the buffer layer includes:
a first buffer layer disposed on the passivation layer in the GIP area; and a second buffer layer disposed on the planarization layer in the GIP area.

17 . The electroluminescent display device of claim 12 , wherein the buffer layer includes:
a first buffer layer disposed on the passivation layer in the GIP area; and a second buffer layer disposed on the planarization layer in the GIP area.

18 . The electroluminescent display device of claim 1 , wherein the buffer layer does not have a contact hole or does not come into contact with a contact hole configured in an upper layer or a lower layer thereof.

19 . The electroluminescent display device of claim 12 , wherein the buffer layer does not have a contact hole or does not come into contact with a contact hole configured in an upper layer or a lower layer thereof.

20 . The electroluminescent display device of claim 18 , wherein the buffer layer is disposed between an edge of the light emitting element and the oxide thin film transistor disposed on the substrate in the GIP area.

21 . The electroluminescent display device of claim 19 , wherein the buffer layer is disposed between an edge of the light emitting element and the oxide thin film transistor disposed on the substrate in the GIP area.

22 . The electroluminescent display device of claim 18 , wherein the buffer layer is disposed below an end of the light emitting unit and is disposed over the oxide thin film transistor to cover a contact hole due to the oxide thin film transistor in the GIP area.

23 . The electroluminescent display device of claim 19 , wherein the buffer layer is disposed below an end of the light emitting unit and is disposed over the oxide thin film transistor to cover a contact hole due to the oxide thin film transistor in the GIP area.

Assignees

• Lg Display Co Ltd

Inventors

• Park Joonwon
• Kim Hanil

Classifications

• H10D30/6755

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D86/481

  integrated with passive devices, e.g. auxiliary capacitors · CPC title

• H10D86/451

  characterised by the compositions or shapes of the interlayer dielectrics · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title