Digital load control system providing power and communication via existing power wiring

US12507335B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12507335-B2
Application numberUS-202218145037-A
CountryUS
Kind codeB2
Filing dateDec 22, 2022
Priority dateJan 17, 2012
Publication dateDec 23, 2025
Grant dateDec 23, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A controller comprises a controllably conductive device adapted to be coupled in series electrical connection between an AC power source and a load control device. The controller also comprises a control circuit coupled to the controllably conductive device for rendering the controllably conductive device conductive each half-cycle of the AC power source to generate a phase-control voltage. The control circuit is operable to render the controllably conductive device conductive for a portion of each half-cycle of the AC power source. The control circuit is operable to transmit a digital message to the load control device for controlling the power delivered to the load by encoding digital information in timing edges of the phase-control voltage, where the phase-control voltage having at least one timing edge in each half-cycle of the AC power source when the control circuit is transmitting the digital message to the load control device.

First claim

Opening claim text (preview).

What is claimed is: 1 . An electrical load control method, comprising: causing, by an electrical load control circuit, an operatively coupled controllably conductive device to generate a phase controlled alternating current (AC) voltage, the phase controlled AC voltage defining an interval between a first firing time of a first half cycle of an AC source voltage and a second firing time of a second half cycle of the AC source voltage; and causing, by the electrical load control circuit, the operatively coupled controllably conductive device to delay the second firing time of the second half cycle by one of a plurality of defined temporal offsets relative to the first firing time of the first half-cycle, each of the plurality of temporal offsets corresponding to at least one data bit. 2 . The electrical load control method of claim 1 wherein causing the operatively coupled controllably conductive device to generate the phase controlled alternating current (AC) voltage further comprises: causing, by the electrical load control circuit, the operatively coupled controllably conductive device to generate a forward phase-controlled AC voltage. 3 . The electrical load control method of claim 1 , further comprising: causing, by the electrical load control circuit, the operatively coupled controllably conductive device to delay a defined number of second firing times to provide a defined sequence of data bits indicative of a “start of message” indicator. 4 . The electrical load control method of claim 1 , further comprising: causing, by the electrical load control circuit, the operatively coupled controllably conductive device to generate an electrical load device control message including a plurality of data bits. 5 . The electrical load control method of claim 4 , wherein causing the operatively coupled controllably conductive device to generate the electrical load device control message including the plurality of data bits further comprises: causing, by the electrical load control circuit, the operatively coupled controllably conductive device to generate an electrical load device control message that includes a plurality of data fields. 6 . The electrical load control method of claim 5 , wherein causing the operatively coupled controllably conductive device to generate an electrical load device control message that includes a plurality of data fields further comprises: causing, by the electrical load control circuit, the operatively coupled controllably conductive device to generate an electrical load device control message that includes: a four-bit message start field; a four-bit channel mask field; a two-bit command type field; a five-bit data field; and a five-bit error detection field. 7 . The electrical load control method of claim 1 wherein causing the operatively coupled controllably conductive device to delay the second firing time of the second half cycle by one of a plurality of defined temporal offsets further comprises: causing, by the electrical load control circuit, the operatively coupled controllably conductive device to delay the second firing time of the second half cycle by one of four defined temporal offsets. 8 . The electrical load control method of claim 7 wherein causing the operatively coupled controllably conductive device to delay the second firing time of the second half cycle by one of four defined temporal offsets, each of the four temporal offsets corresponding to at least one data bit, further comprises: causing, by the electrical load control circuit, the operatively coupled controllably conductive device to delay the second firing time of the second half cycle by one of four defined temporal offsets, each of the four defined temporal offsets corresponding to a respective unique combination of two data bits. 9 . An electrical load controller, comprising: a controllably conductive device couplable between an alternating current (AC) source voltage and an electrical load device; and a control circuit operatively coupled to the controllably conductive device, the control circuit to: cause the controllably conductive device to generate a phase controlled alternating current (AC) voltage, the phase-controlled AC voltage defining an interval between a first firing time of a first half cycle of the AC source voltage and a second firing time of a second half cycle of the AC source voltage; and cause the operatively coupled controllably conductive device to delay the second firing time of the second half cycle by one of a plurality of defined temporal offsets relative to the first firing time of the first half-cycle, each of the plurality of temporal offsets corresponding to at least one data bit. 10 . The electrical load controller of claim 9 wherein to cause the operatively coupled controllably conductive device to generate the phase-controlled AC voltage further comprises: cause the operatively coupled controllably conductive device to generate a forward phase-controlled AC voltage. 11 . The electrical load controller of claim 9 , the control circuit to further: cause the operatively coupled controllably conductive device to delay a defined number of second firing times to provide a defined sequence of data bits indicative of a “start of message” indicator. 12 . The electrical load controller of claim 9 , the control circuit to further: cause the operatively coupled controllably conductive device to generate an electrical load device control message including a plurality of data bits. 13 . The electrical load controller of claim 12 , wherein to cause the operatively coupled controllably conductive device to generate the electrical load device control message including the plurality of data bits, the control circuit to further: cause the operatively coupled controllably conductive device to generate an electrical load device control message that includes a plurality of data fields. 14 . The electrical load controller of claim 13 , wherein to cause the operatively coupled controllably conductive device to generate the electrical load device control message that includes the plurality of data fields, the control circuit to further: cause the operatively coupled controllably conductive device to generate an electrical load device control message that includes: a four-bit message start field; a four-bit channel mask field; a two-bit command type field; a five-bit data field; and a five-bit error detection field. 15 . The electrical load controller of claim 9 wherein to cause the operatively coupled controllably conductive device to delay the second firing time of the second half cycle by one of a plurality of defined temporal offsets, the control circuit to further: cause the operatively coupled controllably conductive device to delay the second firing time of the second half cycle by one of four defined temporal offsets. 16 . The electrical load controller of claim 15 wherein to cause the operatively coupled controllably conductive device to delay the second firing time of the second half cycle by one of four defined temporal offsets, each of the four temporal offsets corresponding to at least one data bit, the control circuit to further: cause the operatively coupled controllably conductive device to delay the second firing time of the second half cycle by one of four defined temporal offsets, each of the four defined temporal offsets corresponding to a respective unique combination of two data bits. 17 . A non-transitory, machine-readable, storage device that includes machine-r

Assignees

Inventors

Classifications

  • by determining the presence or movement of objects or living beings · CPC title

  • H05B47/185Primary

    via power line carrier transmission · CPC title

  • Controlling the intensity of the light · CPC title

  • H05B47/19Primary

    via wireless transmission · CPC title

  • Control techniques providing energy savings, e.g. smart controller or presence detection · CPC title

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Frequently asked questions

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What does patent US12507335B2 cover?
A controller comprises a controllably conductive device adapted to be coupled in series electrical connection between an AC power source and a load control device. The controller also comprises a control circuit coupled to the controllably conductive device for rendering the controllably conductive device conductive each half-cycle of the AC power source to generate a phase-control voltage. The…
Who is the assignee on this patent?
Lutron Tech Co Llc
What technology area does this patent fall under?
Primary CPC classification H05B47/185. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 23 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).