Cross-link signaling for multi-link devices

US12507296B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12507296-B2
Application numberUS-202217821452-A
CountryUS
Kind codeB2
Filing dateAug 22, 2022
Priority dateAug 22, 2022
Publication dateDec 23, 2025
Grant dateDec 23, 2025

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

This disclosure provides methods, devices, and systems for communicating cross-link multi-link signaling (MLS) control signaling in wireless local area networks (WLANs). In various aspects, an apparatus may generate a frame that includes a header including an MLS subfield that includes a set of bits associated with a respective link of a set of links between the first MLD and a second MLD. The apparatus may configure a signaling type (s-type) of the MLS subfield with a value indicating a type of MLS control signaling associated with the MLS subfield, and may configure each bit of a first subset of bits of the MLS subfield with a value indicating that the type of MLS control signaling is applicable to the respective link associated with the bit. Further, the apparatus may output the first frame for transmission to the second MLD on a first link of the set of links.

First claim

Opening claim text (preview).

What is claimed is: 1 . An apparatus configured for wireless communication at a first multi-link device (MLD), the apparatus comprising: a memory; a processing system coupled with the memory and configured to cause the first MLD to: generate a frame that includes a header including a first field that includes a multi-link signaling (MLS) subfield, the MLS subfield including a set of bits, each bit of the set of bits being associated with a respective link of a set of links between the first MLD and a second MLD; configure a signaling type (s-type) of the MLS subfield with a value indicating a type of MLS control signaling associated with the MLS subfield; and configure each bit of a first subset of bits of the set of bits of the MLS subfield with a value indicating that the type of MLS control signaling is applicable to the respective link associated with the bit; and a first interface configured to output the first frame for transmission to the second MLD on a first link of the set of links. 2 . The apparatus of claim 1 , wherein the first field further includes a control subfield, and wherein the processing system is further configured to configure a control ID of the control subfield with a value indicating that the control subfield includes the MLS subfield. 3 . The apparatus of claim 2 , wherein the value with which the control ID is configured is associated with an access point (AP) assistance requested (AAR) subfield. 4 . The apparatus of claim 1 , wherein the MLS subfield comprises a link ID bitmap that includes the set of bits, wherein each bit is configured at a respective bit position of a set of bit positions, and wherein each of the set of bit positions in the link ID bitmap indicates a respective association between a bit of the set of bits at the bit position and the respective link. 5 . The apparatus of claim 4 , wherein the processing system is further configured to: configure each bit of a second subset of bits of the set of bits of the MLS subfield with a value indicating that the type of MLS control signaling is inapplicable to the respective link associated with the bit. 6 . The apparatus of claim 1 , wherein the header of the first frame further includes a second field having a power management bit configured with a value that is associated with one of a power save mode or an active mode, and wherein the value of the s-type indicates that the power management bit is applicable to the links associated with the first subset of bits. 7 . The apparatus of claim 1 , wherein the header of the first frame further includes a second field having an end-of-service-period bit configured with a value that is associated with one of a power save mode or an active mode, and wherein the value of the s-type indicates that the end-of-service-period bit is applicable to the links associated with the first subset of bits. 8 . The apparatus of claim 1 , wherein the processing system is further configured to: generate a set of second frames that each includes a respective header having one of a power management bit or an end-of-service-period bit; configure, in the respective header of each second frame, the one of the power management bit or the end-of-service-period bit with a respective value that is associated with one of a power save mode or an active mode; and wherein the first interface is further configured to output each second frame of the set of second frames for transmission to the second MLD on a respective link of the set of links, wherein the value of the s-type indicates that the one of the power management bit or the end-of-service-period bit included in the respective header is applicable to the respective link on which each second frame is transmitted. 9 . The apparatus of claim 8 , wherein each of the set of second frames most recently indicates the one of the power management bit or the end-of-service-period bit for the respective link on which the second frame is transmitted. 10 . The apparatus of claim 1 , wherein the value of the s-type further indicates that the links associated with the first subset of bits are recommended for communication between the first MLD and the second MLD. 11 . The apparatus of claim 1 , wherein the value of the s-type further indicates that the links associated with the first subset of bits are one of enabled or disabled. 12 . The apparatus of claim 1 , wherein the value of the s-type further indicates a change on the links associated with the first subset of bits to at least one of: a data rate of communication, a redundancy scheme used for communication, an immediacy expectation of multi-link control responses, or a multi-link mode. 13 . The apparatus of claim 1 , wherein the value of the s-type further indicates a request to perform a request to send (RTS)/clear to send (CTS) procedure for a frame exchange on each link of the links associated with the first subset of bits. 14 . The apparatus of claim 1 , further comprising: a second interface configured to obtain a second frame from the second MLD, the second frame comprising an acknowledgement associated with the first frame, wherein the processing system is further configured to configure a power management state associated with each link of the links associated with the first subset of bits in response to the acknowledgement. 15 . An apparatus configured for wireless communication at a first multi-link device (MLD), the apparatus comprising: a memory; a first interface configured to obtain a first frame that includes a header including a first field that includes a multi-link signaling (MLS) subfield received from a second MLD on a first link of a set of links between the first MLD and the second MLD, the MLS subfield including a set of bits, each bit of the set of bits being associated with a respective link of the set of links; and a processing system coupled with the memory and configured to cause the first MLD to: identify a signaling type (s-type) of MLS control signaling based on a value with which the MLS subfield is configured; and apply the MLS control signaling to each link of a first subset of links, of the set of links, respectively associated with a first subset of bits, of the set of bits, that are configured with a value indicating that the s-type of the MLS control signaling is applicable to the link. 16 . The apparatus of claim 15 , wherein the processing system is further configured to: interpret control information with which a control information subfield of a control subfield of the first field is configured as MLS control information with which the MLS subfield is configured based on a control identifier (ID) of the control subfield. 17 . The apparatus of claim 16 , wherein the value with which the control ID is configured is associated with an access point (AP) assistance requested (AAR) subfield. 18 . The apparatus of claim 15 , wherein to apply the MLS control signaling to each link of the first subset of links, the processing system is further configured to configure a respective mode of each link of the first subset of links based on the MLS control signaling. 19 . The apparatus of claim 18 , further comprising: a second interface configured to output a second frame for transmission to the second MLD, the second frame comprising an acknowledgement associated with the first frame, wherein the s-type of the MLS control signaling is associated with a power management mode of the second MLD. 20 . The apparatus of clai

Assignees

Inventors

Classifications

  • with collision avoidance · CPC title

  • where the received signal is a power saving command · CPC title

  • switching on or off only a part of the equipment circuit blocks · CPC title

  • in access points, e.g. base stations · CPC title

  • where the received signal is a wanted signal · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12507296B2 cover?
This disclosure provides methods, devices, and systems for communicating cross-link multi-link signaling (MLS) control signaling in wireless local area networks (WLANs). In various aspects, an apparatus may generate a frame that includes a header including an MLS subfield that includes a set of bits associated with a respective link of a set of links between the first MLD and a second MLD. The …
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H04W76/15. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 23 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).