Circuit and method of providing common mode suppression for amplifier

Patent metadata

Field	Value
Publication number	US-12506455-B2
Application number	US-202217662515-A
Country	US
Kind code	B2
Filing date	May 9, 2022
Priority date	May 9, 2022
Publication date	Dec 23, 2025
Grant date	Dec 23, 2025

Abstract

A semiconductor device has an amplifier and common mode suppression (CMS) circuit formed on a common substrate. The CMS circuit has a first input and second input coupled for receiving an input signal and further has a first output coupled to a first input of the amplifier and a second output coupled to a second input of the amplifier to reduce common mode. The CMS circuit further has a ground plane, a first conductive trace disposed over the ground plane and coupled between the first input and first output, second conductive trace disposed over the ground plane and coupled between the second input and second output, and third conductive trace disposed over the ground plane with a first end of the third conductive trace coupled to the ground plane and a second end of the third conductive trace open circuit to form a resonator.

First claim

What is claimed:

1 . A semiconductor device, comprising:
an amplifier; and a common mode suppression circuit including a first input terminal and second input terminal coupled for receiving an input signal and further including a first output terminal coupled to a first input terminal of the amplifier and a second output terminal coupled to a second input terminal of the amplifier to reduce common mode, wherein the common mode suppression circuit includes,
(a) a ground plane, wherein the ground plane includes an isolation region to form slots within the ground plane,
(b) a first conductive trace disposed over the ground plane and coupled between the first input terminal and first output terminal,
(c) a second conductive trace disposed over the ground plane and coupled between the second input terminal and second output terminal, and
(d) a third conductive trace disposed over the ground plane with a first end of the third conductive trace coupled to the ground plane and a second end of the third conductive trace open circuit.

2 . The semiconductor device of claim 1 , wherein the first conductive trace includes a first straight portion and an angled portion extending from the first straight portion and a second straight portion extending from the angled portion.

3 . The semiconductor device of claim 1 , further including a serpentine-shaped insulating region formed over the ground plane.

4 . The semiconductor device of claim 1 , further including:
a first insulating layer formed between the ground plane and third conductive trace; and a second insulating layer formed between the third conductive trace and the first conductive trace.

5 . The semiconductor device of claim 1 , wherein the amplifier includes multiple stages of amplifiers.

6 . A semiconductor device, comprising a common mode suppression circuit including a first input terminal and second input terminal coupled for receiving an input signal and further including a first output terminal and a second output terminal providing an output signal with a reduced common mode, wherein the common mode suppression circuit includes,
(a) a ground plane, (b) a first conductive trace disposed over the ground plane and coupled between the first input terminal and first output terminal, (c) a second conductive trace disposed over the ground plane and coupled between the second input terminal and second output terminal, (d) a third conductive trace disposed over the ground plane with a first end of the third conductive trace coupled to the ground plane and a second end of the third conductive trace open circuit, (e) a first insulating layer formed between the ground plane and third conductive trace, and (f) a second insulating layer formed between the third conductive trace and the first conductive trace.

7 . The semiconductor device of claim 6 , further including an amplifier comprising a first input terminal coupled to the first output terminal of the common mode suppression circuit and a second input terminal coupled to the second output terminal of the common mode suppression circuit.

8 . The semiconductor device of claim 7 , wherein the amplifier includes multiple stages of amplifiers.

9 . The semiconductor device of claim 6 , wherein the ground plane includes an isolation region to form slots within the ground plane.

10 . A method of making a semiconductor device, comprising:
providing a substrate; forming an amplifier over the substrate; forming a common mode suppression circuit over the substrate with a first input terminal and second input terminal coupled for receiving an input signal and a first output terminal coupled to a first input terminal of the amplifier and a second output terminal coupled to a second input terminal of the amplifier to reduce common mode, wherein forming the common mode suppression circuit includes,
(a) forming a ground plane over the substrate, wherein forming the ground plane includes forming an isolation region to provide slots within the ground plane,
(b) disposing a first conductive trace over the ground plane and coupled between the first input terminal and first output terminal,
(c) disposing a second conductive trace over the ground plane and coupled between the second input terminal and second output terminal, and
(d) disposing a third conductive trace over the ground plane with a first end of the third conductive trace coupled to the ground plane and a second end of the third conductive trace open circuit.

11 . The method of claim 10 , wherein the third conductive trace operates as a resonator.

12 . The method of claim 10 , further including:
forming a first insulating layer between the ground plane and third conductive trace; and forming a second insulating layer between the third conductive trace and the first conductive trace.

13 . The method of claim 10 , wherein the amplifier includes multiple stages of amplifiers.

14 . A method of making a semiconductor device, comprising:
providing a substrate; forming an amplifier over the substrate; forming a common mode suppression circuit over the substrate with a first input terminal and second input terminal coupled for receiving an input signal and a first output terminal coupled to a first input terminal of the amplifier and a second output terminal coupled to a second input terminal of the amplifier to reduce common mode, wherein forming the common mode suppression circuit includes,
(a) forming a ground plane over the substrate,
(b) disposing a first conductive trace over the ground plane and coupled between the first input terminal and first output terminal, wherein the first conductive trace includes a first straight portion and an angled portion extending from the first straight portion and a second straight portion extending from the angled portion,
(c) disposing a second conductive trace over the ground plane and coupled between the second input terminal and second output terminal, and
(d) disposing a third conductive trace over the ground plane with a first end of the third conductive trace coupled to the ground plane and a second end of the third conductive trace open circuit.

15 . The method of claim 14 , further including forming a serpentine-shaped insulating region over the ground plane.

16 . A semiconductor device, comprising a common mode suppression circuit including a first input terminal and second input terminal coupled for receiving an input signal and further including a first output terminal and a second output terminal providing an output signal with a reduced common mode, wherein the common mode suppression circuit includes,
(a) a ground plane, (b) a first conductive trace disposed over the ground plane and coupled between the first input terminal and first output terminal, wherein the first conductive trace includes a first straight portion and an angled portion extending from the first straight portion and a second straight portion extending from the angled portion, (c) a second conductive trace disposed over the ground plane and coupled between the second input terminal and second output terminal, and (d) a third conductive trace disposed over the ground plane with a first end of the third conductive trace coupled to the ground plane and a second end of the third conductive trace open circuit.

17 . The semiconductor device of claim 16 , further including a serpentine-shaped insulating region formed over the ground plane.

Assignees

• Macom Tech Solutions Holdings Inc

Inventors

• Nguyen Nguyen
• Phan Trong

Classifications

• H10W44/216

  Waveguides, e.g. strip lines · CPC title

• H10W44/20

  at high-frequency [HF] or radio frequency [RF] · CPC title

• H01P7/082

  Microstripline resonators (H01P7/088 takes precedence) · CPC title

• H01P11/008

  Manufacturing resonators · CPC title

• H03F2200/408

  the output amplifying stage of an amplifier comprising three power stages · CPC title