Tunable hybrid wideband LNA architecture

Patent metadata

Field	Value
Publication number	US-12506447-B2
Application number	US-202217855418-A
Country	US
Kind code	B2
Filing date	Jun 30, 2022
Priority date	Jun 30, 2022
Publication date	Dec 23, 2025
Grant date	Dec 23, 2025

Abstract

Circuits and methods for an LNA that enable selection of a first mode providing high gain with wide output impedance matching, and a second mode providing wideband output impedance matching with improved NF and linearity at moderate gain. Some embodiments allow multiple intermediate modes to enable selection of gain versus linearity and NF. One embodiment includes a matching network having an input terminal configured to be coupled to an amplified-signal terminal of an amplification core, and an output terminal, the matching network including a first inductor coupled between the input terminal and a first node; a second inductor coupled to the first node; a boosted amplification branch coupled between the input terminal and the output terminal; and a non-amplification branch coupled between the first node and the output terminal; wherein the boosted amplification branch is enabled in a first mode, and the non-amplification branch is enabled in a second mode.

First claim

What is claimed is:

1 . A tunable hybrid wideband output impedance matching network having an input terminal configured to be coupled to an amplified-signal terminal of an amplification core, and an output terminal configured to be coupled to a radio-frequency (RF) output terminal, the tunable hybrid wideband output impedance matching network including:
(a) a first inductor coupled between the input terminal and a first node; (b) a second inductor coupled to the first node and configured to be coupled to a power supply; (c) a boosted amplification branch connected between the input terminal and the output terminal; and (d) a non-amplification branch connected between the first node and the output terminal; wherein the boosted amplification branch is enabled in a first mode of operation, and the non-amplification branch is enabled in a second mode of operation, and wherein the first node is not directly connected to the input terminal.

2 . The tunable hybrid wideband output impedance matching network of claim 1 , wherein the boosted amplification branch includes:
(a) a first blocking capacitor coupled to the input terminal; (b) a third inductor configured to be coupled to a reference voltage; (c) a FET having a control gate, a source coupled to the third inductor, and a drain configured to be coupled to the power supply; (d) a first switch coupled between the first blocking capacitor and the control gate of the FET; (e) a second blocking capacitor coupled between the source of the FET and a second node; (f) a second switch coupled between the second node and the output terminal; and (g) third switch coupled to the second node and configured to be coupled to the reference voltage.

3 . The tunable hybrid wideband output impedance matching network of claim 1 , wherein the non-amplification branch includes:
(a) a first blocking capacitor coupled to the first node; (b) a first switch coupled between the first blocking capacitor and a second node; (c) a second switch coupled between the second node and the output terminal; and (d) a third switch coupled to the second node and configured to be coupled to the reference voltage.

4 . The tunable hybrid wideband output impedance matching network of claim 1 , wherein the first and second inductors are implemented as an asymmetric T-coil.

5 . The tunable hybrid wideband output impedance matching network of claim 1 , wherein at least one of the first and second inductors is adjustable.

6 . The tunable hybrid wideband output impedance matching network of claim 1 , wherein at least one of the first and second inductors is dynamically variable.

7 . A tunable hybrid wideband output impedance matching network having an input terminal configured to be coupled to the amplified-signal terminal of an amplification core, and an output terminal configured to be coupled to a radio-frequency (RF) output terminal, the tunable hybrid wideband output impedance matching network including:
(a) a first inductor coupled between the input terminal and a first node; (b) a second inductor coupled to the first node and configured to be coupled to a power supply; (c) a first branch coupled between the input terminal and the output terminal, the first branch including:
(1) a first blocking capacitor coupled to the input terminal;
(2) a third inductor configured to be coupled to a reference voltage;
(3) a FET having a control gate, a source coupled to the third inductor, and a drain configured to be coupled to the power supply;
(4) a first switch coupled between the first blocking capacitor and the control gate of the FET;
(5) a second blocking capacitor coupled between the source of the FET and a second node;
(6) a second switch coupled between the second node and the output terminal; and
(7) a third switch coupled to the second node and configured to be coupled to the reference voltage; and
(d) a second branch coupled between the first node and the output terminal, the second branch including:
(1) a third blocking capacitor coupled to the first node;
(2) a fourth switch coupled between the third blocking capacitor and a third node;
(3) a fifth switch coupled between the third node and the output terminal; and
(4) a sixth switch coupled to the third node and configured to be coupled to the reference voltage;
wherein the first branch is enabled in a first mode of operation, and the second branch is enabled in a second mode of operation.

8 . The tunable hybrid wideband output impedance matching network of claim 7 , wherein the first and second inductors are implemented as an asymmetric T-coil.

9 . The tunable hybrid wideband output impedance matching network of claim 7 , wherein at least one of the first and/or second inductors is adjustable.

10 . The tunable hybrid wideband output impedance matching network of claim 7 , wherein at least one of the first and/or second inductors is dynamically variable.

11 . The tunable hybrid wideband output impedance matching network of claim 7 , wherein at least one of the third inductor, the first blocking capacitor, the second blocking capacitor, and/or the third blocking capacitor is adjustable.

12 . The tunable hybrid wideband output impedance matching network of claim 7 , wherein at least one of the third inductor, the first blocking capacitor, the second blocking capacitor, and/or the third blocking capacitor is dynamically variable.

13 . A method of achieving different gain modes for a radio frequency amplifier having an amplifier core with an amplified-signal terminal, the method including:
(a) coupling a first inductor between the amplified-signal terminal and a first node, wherein the first node is not directly connected to the amplified-signal terminal; (b) coupling a second inductor to the first node and configuring the second inductor to be coupled to a power supply; (c) coupling a boosted amplification branch between the amplified-signal terminal and an output terminal; (d) coupling a non-amplification branch between the first node and the output terminal; (e) selectively enabling the boosted amplification branch in a first mode of operation; and (f) selectively enabling the non-amplification branch in a second mode of operation.

14 . A tunable hybrid wideband output impedance matching network having an input terminal and an output terminal, the tunable hybrid wideband output impedance matching network including:
(a) a first inductor coupled between the input terminal and a first node; (b) a second inductor coupled to the first node; (c) a first branch coupled between the input terminal and the output terminal, the first branch including:
(1) a first blocking capacitor coupled to the input terminal;
(2) a FET having a control gate, a source coupled to a third inductor, and a drain;
(3) a first switch coupled between the first blocking capacitor and the control gate of the FET;
(4) a second blocking capacitor coupled between the source of the FET and a second node;
(5) a second switch coupled between the second node and the output terminal; and
(6) a third switch coupled to the second node; and
(d) a second branch coupled between the first node and the output terminal, the second branch including:
(1) a third blocking capacitor coupled to the first node;
(2) a fourth switch coupled between the third blocking capacitor and a third node;
(3) a fifth switch coupled between the third node and the output terminal; and
(4) a sixth switch coupled to the third node;
wherein the first branch is enabled in a first mode of operation, and the second branch is enabled in a second mode of

Assignees

• Murata Manufacturing Co

Inventors

• Ayranci Emre
• Qayyum Jubaid
• Yerramilli Phanindra
• Sanner Miles

Classifications

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F2200/222

  A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier · CPC title

• H03F2200/294

  the amplifier being a low noise amplifier [LNA] · CPC title

• H03F2200/387

  A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title

• H03F3/195

  in integrated circuits · CPC title