IEC notebook limited power source compliance with USB-C port controller

US12504803B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12504803-B2
Application numberUS-202318354521-A
CountryUS
Kind codeB2
Filing dateJul 18, 2023
Priority dateJul 18, 2023
Publication dateDec 23, 2025
Grant dateDec 23, 2025

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

An information handling system includes a power supply configured to provide a main power bus and a secondary power bus and a USB-C port. The USB-C port includes a connector that provides an internal power bus, an input selector that couples the internal power bus to the main power bus, and a controller that enables/disables the coupling of the internal power bus to the main power bus by the input selector, and selectively couple the secondary power bus to the internal power bus. The controller further determines that an over-voltage condition is exhibited on the first internal power bus, and, in response to determining the over-voltage condition, disables the first input selector from coupling the first internal power bus to the main power bus and uncouples the secondary power bus from the first internal power bus.

First claim

Opening claim text (preview).

What is claimed is: 1 . An information handling system, comprising: a power supply configured to provide a main power bus and a secondary power bus; and a first USB-C port including: a first USB-C connector configured to provide a first internal power bus; a first input selector configured to selectively couple the first internal power bus to the main power bus; and a first controller including a first general purpose input/output (GPIO), the first controller configured to enable the first input selector to couple the first internal power bus to the main power bus and to disable the first input selector from coupling the first internal power bus to the main power bus, and to selectively couple the secondary power bus to the first internal power bus; and a second USB-C port including: a second USB-C connector configured to provide a second internal power bus; a second input selector configured to selectively couple the second internal power bus to the main power bus; and a second controller including a second GPIO, the second controller configured to enable the second input selector to couple the second internal power bus to the main power bus and to disable the second input selector from coupling the second internal power bus to the main power bus, and to selectively couple the secondary power bus to the second internal power bus, wherein the first GPIO is coupled to the second GPIO in a wired-OR configuration; wherein the first controller determines that an over-voltage condition is exhibited on the first internal power bus, and, in response to determining the over-voltage condition, disables the first input selector from coupling the first internal power bus to the main power bus, uncouples the secondary power bus from the first internal power bus, and provides an overvoltage indication on the first GPIO; wherein the second controller receives the over-voltage indication on the second GPIO, and, in response to receiving the over-voltage indication, disables the second input selector from coupling the second internal power bus to the main power bus and uncouples the secondary power bus from the second internal power bus; and. 2 . The information handling system of claim 1 , wherein the first controller and the second controller each operate to latch the over-voltage indication. 3 . The information handling system of claim 2 , wherein the over-voltage indication remains latched until a power source device is disconnected from one of the first USB-C connector or the second USB-C connector. 4 . The information handling system of claim 3 , wherein, while the over-voltage indication is latched, the first controller receives power from the first internal power bus and the second controller receives power from the second internal power bus. 5 . The information handling system of claim 3 , wherein, while the over-voltage indication is latched, neither the first controller nor the second controller issues a reset to the power source device. 6 . The information handling system of claim 1 , wherein the secondary power bus is a five (5) volt bus. 7 . A method, comprising: providing, on an information handling system, a power supply configured to provide a main power bus and a secondary power bus; providing, on the information handling system, a first USB-C port including: a first USB-C connector configured to provide a first internal power bus; a first input selector configured to selectively couple the first internal power bus to the main power bus; and a first controller including a first general purpose input/output (GPIO), the first controller being configured to enable the first input selector to couple the first internal power bus to the main power bus and to disable the first input selector from coupling the first internal power bus to the main power bus, and to selectively couple the secondary power bus to the first internal power bus; providing, on the information handling system, a second USB-C port including: a second USB-C connector configured to provide a second internal power bus; a second input selector configured to selectively couple the second internal power bus to the main power bus; and a second controller including a second GPIO, the second controller being configured to enable the second input selector to couple the second internal power bus to the main power bus and to disable the second input selector from coupling the second internal power bus to the main power bus, and to selectively couple the secondary power bus to the second internal power bus; coupling the first GPIO to the second GPIO in a wired-OR configuration; determining, by the first controller, that an over-voltage condition is exhibited on the first internal power bus; in response to determining the over-voltage condition: disabling, by the first controller, the first input selector from coupling the first internal power bus to the main power bus; uncoupling, by the first controller, the secondary power bus from the first internal power bus in response to determining the over-voltage condition; and providing, by the first controller, an over-voltage indication on the first GPIO; and in response to receiving the over-voltage indication: disabling, by the second controller, the second input selector from coupling the second internal power bus to the main power bus; and uncoupling, by the second controller, the secondary power bus from the second internal power bus. 8 . The method of claim 7 , further comprising: latching, by the first controller and the second controller, the over-voltage indication. 9 . The method of claim 8 , wherein the over-voltage indication remains latched until a power source device is disconnected from one of the first USB-C connector or the second USB-C connector. 10 . The method of claim 9 , wherein, while the over-voltage indication is latched, the first controller receives power from the first internal power bus and the second controller receives power from the second internal power bus. 11 . The method of claim 9 , wherein, while the over-voltage indication is latched, neither the first controller nor the second controller issues a reset to the power source device. 12 . An information handling system, comprising: a power supply configured to provide a main power bus and a secondary power bus; a first USB-C port including: a first USB-C connector configured to provide a first internal power bus; a first input selector configured to selectively couple the first internal power bus to the main power bus; and a first controller including a first general purpose input/output (GPIO), the first controller configured to enable the first input selector to couple the first internal power bus to the main power bus and to disable the first input selector from coupling the first internal power bus to the main power bus, and to selectively couple the secondary power bus to the first internal power bus; and a second USB-C port including: a second USB-C connector configured to provide a second internal power bus; a second input selector configured to selectively couple the second internal power bus to the main power bus; and a second controller including a second GPIO, the second controller configured to enable the second input selector to couple the second internal power bus to the main power bus and to disable the second input selector from coupling the second internal power bus to the main power bus, and to selectively couple the secondary power bus to the second internal power bus, wherein the first GPIO is coupled to the second GPIO in a wired-OR configuration; wherein the first controller: determines tha

Assignees

Inventors

Classifications

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

  • Universal serial bus [USB] · CPC title

  • Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

  • G06F1/266Primary

    Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips · CPC title

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What does patent US12504803B2 cover?
An information handling system includes a power supply configured to provide a main power bus and a secondary power bus and a USB-C port. The USB-C port includes a connector that provides an internal power bus, an input selector that couples the internal power bus to the main power bus, and a controller that enables/disables the coupling of the internal power bus to the main power bus by the in…
Who is the assignee on this patent?
Dell Products Lp
What technology area does this patent fall under?
Primary CPC classification G06F1/266. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 23 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).