Display panels and manufacturing methods thereof, display devices and spliced display devices

Patent metadata

Field	Value
Publication number	US-12504663-B2
Application number	US-202418898191-A
Country	US
Kind code	B2
Filing date	Sep 26, 2024
Priority date	Mar 31, 2021
Publication date	Dec 23, 2025
Grant date	Dec 23, 2025

Abstract

Provided are a display panel and a manufacturing method thereof, a display device and a spliced display device. The display panel includes: a color filter substrate ( 11 ), an array substrate ( 12 ) and a first conductive portion ( 13 ), where a display region (AA) and a peripheral region (NA) are formed on the display panel, and the peripheral region (NA) surrounds the display region (AA); the array substrate ( 12 ) includes pixel circuits and a second conductive portion ( 14 ), where the pixel circuits are located in the display region (AA), and the second conductive portion ( 14 ) is located in the peripheral region (NA); the second conductive portion ( 14 ) is connected with the pixel circuits; the first conductive portion ( 13 ) is located on a side surface of the array substrate ( 12 ) and a side surface of the color filter substrate ( 11 ), and the first conductive portion ( 13 ) is connected with the second conductive portion ( 14 ). By such technical solutions, a width of the peripheral region can be reduced, which is beneficial to realizing a narrow bezel and increasing a screen-to-body ratio.

First claim

The invention claimed is:

1 . A display panel, comprising:
a display region and a peripheral region surrounding the display region; a color filter substrate comprising a first central region and a first edge region surrounding the first central region; an array substrate opposite to the color filter substrate and comprising:
a second central region and a second edge region surrounding the second central region,
pixel circuits in the display region, and
a second conductive portion, in the peripheral region and connected with the pixel circuits,
wherein the pixel circuits and the second conductive portion are on a side of the array substrate facing the color filter substrate;
a first conductive portion on a side surface of the array substrate and a side surface of the color filter substrate, wherein a first end of the first conductive portion is on the side surface of the color filter substrate, a second end of the first conductive portion is on the side surface of the array substrate, and the first conductive portion is connected with the second conductive portion; a first polarizer on a side of the color filter substrate away from the array substrate, wherein a projection of the first polarizer onto the color filter substrate is within the first central region; a second polarizer on a side of the array substrate away from the color filter substrate, wherein a projection of the second polarizer onto the array substrate is within the second central region; a first light shielding layer on a side of the color filter substrate facing the first polarizer, wherein the first light shielding layer is in the first edge region and covers side surfaces of the first polarizer; a second light shielding layer on a side of the array substrate facing the second polarizer, wherein the second light shielding layer is in the second edge region and covers side surfaces of the second polarizer; a first water and oxygen barrier layer covering the first light shielding layer; and a second water and oxygen barrier layer covering the second light shielding layer.

2 . The display panel according to claim 1 , wherein a distance between the first end of the first conductive portion and the second end of the first conductive portion is smaller than a distance between a first surface of the color filter substrate away from the array substrate and a second surface of the array substrate away from the color filter substrate.

3 . The display panel according to claim 1 , wherein the first conductive portion is between a first central axis of the side surface of the color filter substrate and a second central axis of the side surface of the array substrate; wherein the first central axis and the second central axis are respectively perpendicular to a direction from the first end of the first conductive portion to the second end of the first conductive portion.

4 . The display panel according to claim 3 , wherein a distance between the first end of the first conductive portion and the first central axis is a first distance, and a distance between the second end of the first conductive portion and the second central axis is a second distance, wherein the first distance is equal to the second distance.

5 . The display panel according to claim 1 , further comprising: chip-on-films, wherein the chip-on-films are bonded together with the first conductive portion, and the chip-on-films are electrically connected with the first conductive portion.

6 . The display panel according to claim 5 , further comprising: a conductive film layer, wherein the conductive film layer is between the first conductive portion and the chip-on-films, and the first conductive portion is in electrical communication with the chip-on-films through the conductive film layer.

7 . The display panel according to claim 6 , wherein the first conductive portion comprises a plurality of first conductive portions, and the conductive film layer covers the plurality of first conductive portions;
wherein the plurality of first conductive portions comprise a plurality of central conductive portions and a plurality of edge conductive portions, wherein the central conductive portions are in middle of the plurality of first conductive portions, and the edge conductive portions are in edges of the plurality of first conductive portions; and wherein the chip-on-films are connected with the plurality of central conductive portions through the conductive film layer.

8 . The display panel according to claim 5 , further comprising: a printed circuit board, wherein the printed circuit board is on a side of the chip-on-films away from the array substrate, and is connected with the chip-on-films.

9 . The display panel according to claim 8 , wherein a width of part of a chip-on-film near the printed circuit board is smaller than a width of part of the chip-on-film near the array substrate.

10 . The display panel according to claim 1 ,
wherein the color filter substrate comprises a first edge and a second edge, the first edge is on a first side of the color filter substrate, and the second edge is on a second side of the color filter substrate, the second side is a side other than the first side, and the first conductive portion is on the first side of the color filter substrate; wherein a distance between a third edge of the first polarizer on the first side and the first edge is 0.05˜1.7 mm, and the third edge is parallel to the first edge, a distance between a fourth edge of the first polarizer on the second side and the second edge is 0˜0.1 mm, and the fourth edge is parallel to the second edge; wherein the array substrate comprises a fifth edge and a sixth edge, the fifth edge is on the first side of the array substrate, and the sixth edge is on the second side of the array substrate; and wherein a distance between a seventh edge of the second polarizer on the first side and the fifth edge is 0.1˜1.7 mm, the seventh edge is parallel to the fifth edge, a distance between an eighth edge of the second polarizer on the second side and the sixth edge is 0˜0.1 mm, and the eighth edge is parallel to the sixth edge.

11 . The display panel according to claim 1 , wherein the color filter substrate comprises a third light shielding layer and a fourth light shielding layer;
wherein the peripheral region comprises a first sub-region and a second sub-region, the first sub-region is between the display region and the first conductive portion, and the second sub-region is a region other than the first sub-region in the peripheral region; wherein a projection of the third light shielding layer onto the array substrate is within the first sub-region, and a projection of the fourth light shielding layer onto the array substrate is within the second sub-region; and wherein a width of the third light shielding layer is 0.6˜1.0 mm, and a width of the fourth light shielding layer is 0.25˜0.5 mm.

12 . A display device, comprising:
a light emitting module, and a display panel, comprising:
a display region and a peripheral region surrounding the display region;
a color filter substrate comprising a first central region and a first edge region surrounding the first central region;
an array substrate opposite to the color filter substrate and comprising:
a second central region and a second edge region surrounding the second central region;
pixel circuits in the display region, and
a second conductive portion, in the peripheral region and connected with the pixel circuits;
wherein the pixel circuits and the second conductive portion are on a side of the array substrate facing the color filter substrate;

a first conductive portion o

Assignees

• Beijing Boe Display Tech Co
• Boe Technology Group Co Ltd
• Beijing Boe Technology Dev Co Ltd

Inventors

• Wu Bin
• Zhong Wei
• Sun Xiaodi
• Shi Haijun
• Wang Bochang
• Tian Chunguang
• Feng Hongbo

Classifications

• G02F1/136209

  Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

• G02F1/13306

  Circuit arrangements or driving methods for the control of single liquid crystal cells (G02F1/132, G02F1/133382 take precedence) · CPC title

• G02F1/133314

  Back frames · CPC title

• G02F1/133531

  characterised by the arrangement of polariser or analyser axes · CPC title

• G02F1/133317

  Intermediate frames, e.g. between backlight housing and front frame · CPC title