Display panel and light emitting base plate

US12499834B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12499834-B2
Application numberUS-202418813271-A
CountryUS
Kind codeB2
Filing dateAug 23, 2024
Priority dateAug 30, 2021
Publication dateDec 16, 2025
Grant dateDec 16, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The display panel and a light emitting base plate are provided. The display panel includes a pixel circuit disposed on a base plate, wherein the pixel circuit includes a first driving circuit, a first light emitting device, a second light emitting device and a second driving circuit that are sequentially connected in series; the first driving circuit includes a first driving transistor, a source electrode of the first driving transistor is connected to a first power-supply terminal, and a drain electrode of the first driving transistor is connected to a first electrode of the first light emitting device; the second driving circuit includes a second driving transistor, a source electrode of the second driving transistor is connected to a second power-supply terminal, and a drain electrode of the second driving transistor is connected to a first electrode of the second light emitting device.

First claim

Opening claim text (preview).

The invention claimed is: 1 . A display panel, comprising a pixel circuit disposed on a base plate, wherein the pixel circuit comprises a first driving circuit, a first light emitting device, a second light emitting device and a second driving circuit that are sequentially connected in series; a first end of the first driving circuit is connected to a first power-supply terminal, a second end of the first driving circuit is connected to a first electrode of the first light emitting device; a first end of the second driving circuit is connected to a second power-supply terminal, a second end of the second driving circuit is connected to a first electrode of the second light emitting device; a second electrode of the first light emitting device is connected to a second electrode of the second light emitting device; and one of the second electrode of the first light emitting device and the second electrode of the second light emitting device is an anode, and the other is a cathode. 2 . The display panel according to claim 1 , wherein the second electrode of the first light emitting device is directly connected to the second electrode of the second light emitting device. 3 . The display panel according to claim 1 , wherein one of the first light emitting device and the second light emitting device is of an uprightly placed structure, and the other is of an inversely placed structure. 4 . The display panel according to claim 3 , wherein the display panel further comprises an electrode layer, the electrode layer is disposed at one side of the first driving circuit and the second driving circuit that is away from the base plate, and the electrode layer is reused as the second electrode of the first light-emitting device and the second electrode of the second light-emitting device. 5 . The display panel according to claim 4 , wherein the display panel further comprises a bleeder component configured to make a difference between an electric current in the first light emitting device and an electric current in the second light emitting device to be equal to an electric current in the bleeder component, and the bleeder component is connected to the electrode layer by a via hole. 6 . The display panel according to claim 5 , wherein the first driving circuit comprises a first driving transistor, a source electrode of the first driving transistor is connected to the first power-supply terminal, and a drain electrode of the first driving transistor is connected to the first electrode of the first light emitting device; the second driving circuit comprises a second driving transistor, a source electrode of the second driving transistor is connected to the second power-supply terminal, and a drain electrode of the second driving transistor is connected to the first electrode of the second light emitting device; and a channel type of the first driving transistor and a channel type of the second driving transistor are different. 7 . The display panel according to claim 6 , wherein one of the first power-supply terminal and the second power-supply terminal is a high-level-signal inputting terminal, and the other is a low-level-signal inputting terminal. 8 . The display panel according to claim 7 , wherein the channel type of the first driving transistor is a P type, the channel type of the second driving transistor is an N type, the first electrode of the first light emitting device is an anode, the first electrode of the second light emitting device is a cathode, and a voltage inputted by the first power-supply terminal is greater than a voltage inputted by the second power-supply terminal; or the channel type of the first driving transistor is an N type, the channel type of the second driving transistor is a P type, the first electrode of the first light emitting device is a cathode, the first electrode of the second light emitting device is an anode, and the voltage inputted by the first power-supply terminal is less than the voltage inputted by the second power-supply terminal. 9 . The display panel according to claim 8 , wherein the first driving circuit further comprises a seventh transistor disposed between the first driving transistor and the first power-supply terminal, and a sixth transistor disposed between the first driving transistor and the first light emitting device, a grid electrode of the sixth transistor is connected to a first light-emission controlling terminal, a first electrode of the sixth transistor is connected to a drain electrode of the first driving transistor, and a second electrode of the sixth transistor is connected to the first electrode of the first light emitting device, a grid electrode of the seventh transistor is connected to the first light-emission controlling terminal, a first electrode of the seventh transistor is connected to the source electrode of the first driving transistor, and a second electrode of the seventh transistor is connected to the first power-supply terminal; and/or the second driving circuit further comprises an eleventh transistor and a twelfth transistor, a grid electrode of the eleventh transistor is connected to a second light-emission controlling terminal, a first electrode of the eleventh transistor is connected to the drain electrode of the second driving transistor, and a second electrode of the eleventh transistor is connected to a first electrode of the second light emitting device. 10 . The display panel according to claim 9 , wherein the first driving circuit comprises: a first capacitor, wherein a first electrode of the first capacitor is connected to the first power-supply terminal, and a second electrode of the first capacitor is connected to a grid electrode of the first driving transistor; a first resetting module configured for, at a first resetting stage, transmitting a signal of a first initialized-voltage terminal to the grid electrode of the first driving transistor and the second electrode of the first capacitor; a first writing module configured for, at a first writing stage, writing a data signal of a first data writing terminal into the source electrode of the first driving transistor; a first compensating module configured for, at the first writing stage, conducting the drain electrode of the first driving transistor with the grid electrode of the first driving transistor; and a first light-emission controlling module configured for, at the first resetting stage and the first writing stage, disconnecting the source electrode of the first driving transistor from the first power-supply terminal, disconnecting the drain electrode of the first driving transistor from the first electrode of the first light emitting device, and, at a light-emission stage, conducting the source electrode of the first driving transistor with the first power-supply terminal, and conducting the drain electrode of the first driving transistor with the first electrode of the first light emitting device; and the second driving circuit comprises: a second capacitor, wherein a first electrode of the second capacitor is connected to the second power-supply terminal, and a second electrode of the second capacitor is connected to a grid electrode of the second driving transistor; a second resetting module configured for, at a second resetting stage, transmitting a signal of a second initialized-voltage terminal to the grid electrode of the second driving transistor and the second electrode of the second capacitor; a second writing module configured for, at a second writing stage, writing a data signal of a second data writing terminal into the source electrode of the second driving transistor; a second compensating module configured for, at the second writing

Assignees

Inventors

Classifications

  • Power management, e.g. power saving · CPC title

  • Pixel structures · CPC title

  • Layout of electrodes and connections · CPC title

  • G09G3/32Primary

    semiconductive, e.g. using light-emitting diodes [LED] · CPC title

  • characterised by the geometry or disposition of pixel elements · CPC title

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Frequently asked questions

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What does patent US12499834B2 cover?
The display panel and a light emitting base plate are provided. The display panel includes a pixel circuit disposed on a base plate, wherein the pixel circuit includes a first driving circuit, a first light emitting device, a second light emitting device and a second driving circuit that are sequentially connected in series; the first driving circuit includes a first driving transistor, a sourc…
Who is the assignee on this patent?
Beijing Boe Technology Dev Co Ltd, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/32. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 16 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).