Image processor and operation method for optimizing on screen display resolution

Patent metadata

Field	Value
Publication number	US-12499651-B2
Application number	US-202318327894-A
Country	US
Kind code	B2
Filing date	Jun 2, 2023
Priority date	Jun 2, 2023
Publication date	Dec 16, 2025
Grant date	Dec 16, 2025

Abstract

An operation method performed by an image processor is provided, including the following operations of receiving a mixed image including an input image and a first on-screen-display (OSD) pattern and generating a second OSD pattern, different from the first OSD pattern, based on the mixed image. The second OSD pattern encompasses protection regions of the input image, and the protection regions are in close proximity of the first OSD pattern. The method further includes operations of performing image processing to remaining regions, different from the protection regions, of the input image and generating an output image. The output image includes the second OSD pattern and the remaining regions of the input image, being performed by the image processing.

First claim

What is claimed is:

1 . An operation method performed by an image processor, comprising:
receiving, by the image processor, a mixed image including an input image and a first on-screen-display (OSD) pattern; generating, by the image processor, a first OSD map and a blending image based on the mixed image; generating, by the image processor, a second OSD map based on a plurality of first pixel values of the first OSD map and a plurality of second pixel values of the blending image, wherein generating the second OSD map comprises:
comparing, by the image processor, a maximum of a first portion of the plurality of first pixel values with a maximum of a second portion of the plurality of first pixel values to obtain a first difference, wherein the first portion of the plurality of first pixel values correspond to a plurality of key pixels in the first OSD map, and the second portion of the plurality of first pixel values correspond to a plurality of non-key pixels in the first OSD map;
comparing, by the image processor, the first difference with a first predetermined value;
comparing, by the image processor, a second predetermined value with a second difference between the maximum of the first portion of the plurality of first pixel values and one of the plurality of second pixel values corresponding to a pixel being verified in the blending image; and
in response to the comparison, generating, by the image processor, a plurality of third pixel values of the second OSD map;
generating, by the image processor, a second OSD pattern, different from the first OSD pattern, based on the second OSD map and the blending image, wherein the second OSD pattern encompasses protection regions of the input image, wherein the protection regions are in close proximity of the first OSD pattern; performing, by the image processor, image processing to remaining regions, different from the protection regions, of the input image; and generating, by the image processor, an output image, wherein the output image includes the second OSD pattern and the remaining regions of the input image, being performed by the image processing.

2 . The operation method of claim 1 , wherein the second OSD pattern in the output image includes the first OSD pattern, and
the protection regions in the output image are surrounded by the first OSD pattern in the output image.

3 . The operation method of claim 1 , wherein a plurality of first pixels in the protection regions and a plurality of second pixels in the first OSD pattern are included in a plurality of blocks, wherein each of the plurality of second pixels is arranged in a corner of a corresponding one of the plurality of blocks.

4 . The operation method of claim 1 , wherein pixel values of the protection regions of the input image and pixel values of the protection regions of the output image are the same.

5 . The operation method of claim 1 , wherein a number of pixels included in the second OSD pattern is different from a number of pixels included in the first OSD pattern.

6 . The operation method of claim 5 , wherein the number of the pixels included in the second OSD pattern is greater than the number of the pixels included in the first OSD pattern.

7 . The operation method of claim 1 , wherein performing the image processing to the remaining regions comprises:
performing, by the image processor, color changing processing to the remaining regions.

8 . The operation method of claim 1 , wherein differences between pixel values in the protection regions and pixel values in the first OSD pattern are smaller than differences between pixel values in the remaining regions and pixel values in the first OSD pattern.

9 . The operation method of claim 1 , wherein generating the first OSD map and the blending image comprises:
generating, by the image processor, the first OSD map by adjusting alpha values in a plurality of fourth pixel values in the mixed image to have a first value, and generating, by the image processor, the blending image by adjusting the alpha values to have a second value different from the first value.

10 . The operation method of claim 1 , wherein the second predetermined value equals to a half of the first difference.

Assignees

• Novatek Microelectronics Corp

Inventors

• Huang Chih-Hsuan
• Wang Hung-Ming

Classifications

• G06T5/70

  Denoising; Smoothing · CPC title

• G06V10/25

  Determination of region of interest [ROI] or a volume of interest [VOI] · CPC title

• G06V10/56

  relating to colour · CPC title

• H04N5/265

  Mixing · CPC title

• H04N9/77

  Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase (circuits for matrixing H04N9/67) · CPC title