Short circuit fault protection for a regulator

US12498747B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12498747-B2
Application numberUS-202318356818-A
CountryUS
Kind codeB2
Filing dateJul 21, 2023
Priority dateAug 5, 2022
Publication dateDec 16, 2025
Grant dateDec 16, 2025

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided are techniques for detecting a short circuit fault at an output of a regulator and protecting the regulator from the short circuit fault. An error amplifier receives a reference voltage and a feedback voltage and compares comparing the reference voltage with the feedback voltage for driving a power transistor of the regulator. A modification stage compares an output voltage of the voltage regulator with a fault reference voltage and in response to determining that the output voltage of the voltage regulator is less than the fault reference voltage, drives the power transistor using an internal node of the error amplifier by changing states of a first switch and a second switch and supplies the reference voltage to both the first and second inputs of the error amplifier by changing states of a third switch and a fourth switch.

First claim

Opening claim text (preview).

The invention claimed is: 1 . A device, comprising: an error amplifier having a first input, a second input, an internal node, and an output, the error amplifier being configured to: receive a reference voltage at the first input and a feedback voltage at the second input; and compare the reference voltage with the feedback voltage for driving a power transistor of a voltage regulator; and a modification stage including a plurality of switches and configured to: compare an output voltage of the voltage regulator with a fault reference voltage; and in response to determining that the output voltage of the voltage regulator is less than the fault reference voltage: supply the reference voltage to both the first and second inputs of the error amplifier; and drive the power transistor using the internal node of the error amplifier. 2 . The device of claim 1 , wherein the modification stage is configured to: in response to determining that the output voltage of the voltage regulator is less than the fault reference voltage, disconnect the feedback voltage from the second input. 3 . The device of claim 2 , wherein the modification stage includes a supply monitoring stage configured to: control the plurality of switches by at least: generating a first control signal and a second control signal in response to comparing the output voltage of the voltage regulator with the fault reference voltage, wherein the first control signal is a complementary signal to the second control signal. 4 . The device of claim 3 , wherein the plurality of switches include: a first switch having a first conduction terminal coupled to the output of the error amplifier and a second conduction terminal coupled to the power transistor; and a second switch having a first conduction terminal coupled to the internal node and a second conduction terminal coupled to the power transistor. 5 . The device of claim 4 , wherein the power transistor is configured to be driven using an internal node voltage of the internal node of the error amplifier by placing the first switch in a non-conductive state using the first control signal and placing the second switch in a conductive state using the second control signal. 6 . The device of claim 3 , wherein the plurality of switches include: a third switch coupled between the first input and the second input; and a fourth switch coupled between the second input and a feedback node that provides the feedback voltage. 7 . The device of claim 6 , wherein supplying the reference voltage to both the first and second inputs of the error amplifier includes switching on the third switch based on the second control signal. 8 . The device of claim 6 , wherein disconnecting the feedback voltage from the second input includes switching off the fourth switch based on the first control signal. 9 . The device of claim 6 , comprising: a voltage divider circuit including a first resistor coupled between the power transistor and the feedback node and a second resistor coupled between the feedback node and a reference voltage node. 10 . The device of claim 1 , wherein the voltage regulator is a low-dropout linear regulator, and the modification stage detects a short circuit fault of the low-dropout linear regulator. 11 . The device of claim 1 , wherein the error amplifier amplifies a difference between the reference voltage and the feedback voltage. 12 . A method of controlling a voltage regulator, comprising: receiving a reference voltage at a first input of an error amplifier and a feedback voltage at a second input of the error amplifier; comparing the reference voltage with the feedback voltage for driving a power transistor of the voltage regulator; comparing an output voltage of the voltage regulator with a fault reference voltage; and in response to determining that the output voltage of the voltage regulator is less than the fault reference voltage: driving the power transistor using an internal node of the error amplifier by changing states of a first switch and a second switch; and supplying the reference voltage to both the first and second inputs of the error amplifier by changing states of a third switch and a fourth switch. 13 . The method of claim 12 , further comprising: generating a first control signal and a second control signal in response to determining that the output voltage of the voltage regulator is less than the fault reference voltage, wherein the first control signal is in a reverse logical level of the second control signal. 14 . The method of claim 13 , wherein changing states of the first and second switches includes switching off the first switch by the first control signal and switching on the second switch by the second control signal. 15 . The method of claim 13 , wherein changing states of the third and fourth switches includes switching on the third switch by the second control signal and switching off the fourth switch by the first control signal. 16 . A system comprising: an error amplifier configured to control an output current of a voltage regulator, the error amplifier having a first input, a second input, an output, and an internal node, a reference voltage being coupled to the first input; a transistor configured to supply the output current; a voltage divider circuit configured to provide a feedback loop over the second input of the error amplifier; and a modification stage configured to limit the output current during a fault condition, the modification stage including: a first switch coupled between the output and the transistor; a second switch coupled between the internal node and the transistor; a third switch coupled between the first input and the second input; a fourth switch coupled between the second input and the voltage divider circuit; and a monitoring stage configured to: compare an output voltage of the voltage regulator with a fault reference voltage; determine that the output voltage is less than the fault reference voltage; and in response to determining that the output voltage is less than the fault reference voltage, detect the fault condition and generate a control signal to control states of the first, second, third, and fourth switches. 17 . The system of claim 16 , wherein the control signal causes a voltage of the internal node of the error amplifier to drive the transistor by switching off the first switch and switching on the second switch. 18 . The system of claim 16 , wherein the control signal causes the reference voltage to be coupled to both the first and second inputs of the error amplifier by switching on the third switch. 19 . The system of claim 16 , wherein the control signal causes the voltage divider circuit to be disconnected from the second input of the error amplifier by switching off the fourth switch. 20 . The system of claim 16 , wherein the voltage regulator is a low-dropout linear regulator, and the transistor is a ballast transistor of the low-dropout linear regulator.

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Inventors

Classifications

  • with overcurrent detector · CPC title

  • with overvoltage detector · CPC title

  • for protection · CPC title

  • including two stages of regulation, at least one of which is output level responsive · CPC title

  • G05F1/468Primary

    characterised by reference voltage circuitry, e.g. soft start, remote shutdown · CPC title

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What does patent US12498747B2 cover?
Provided are techniques for detecting a short circuit fault at an output of a regulator and protecting the regulator from the short circuit fault. An error amplifier receives a reference voltage and a feedback voltage and compares comparing the reference voltage with the feedback voltage for driving a power transistor of the regulator. A modification stage compares an output voltage of the volt…
Who is the assignee on this patent?
St Microelectronics Int Nv
What technology area does this patent fall under?
Primary CPC classification G05F1/468. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 16 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).