Display apparatus including wiring connected to source and drain regions of semiconductor layer

Patent metadata

Field	Value
Publication number	US-12495676-B2
Application number	US-202217893922-A
Country	US
Kind code	B2
Filing date	Aug 23, 2022
Priority date	Dec 30, 2021
Publication date	Dec 9, 2025
Grant date	Dec 9, 2025

Abstract

A display apparatus is disclosed that includes a substrate, an additional transistor, a first wiring, a first insulating layer, and a second wiring. The additional transistor is located on the substrate and includes an additional semiconductor layer and an additional gate electrode. The first wiring is integrally formed with the additional gate electrode and extends in a first direction. The first insulating layer is located on the first wiring. The second wiring is located on the first insulating layer and extends in a second direction intersecting the first direction. The second wiring is connected to a source region and a drain region of the additional semiconductor layer.

First claim

What is claimed is:

1 . A display apparatus comprising:
a substrate; an additional transistor located on the substrate and comprising an additional semiconductor layer and an additional gate electrode; a first wiring integrally formed with the additional gate electrode and extending in a first direction; a first insulating layer located on the first wiring; and a second wiring located on the first insulating layer and extending in a second direction intersecting the first direction, wherein the second wiring is directly connected to a source region and a drain region of the additional semiconductor layer.

2 . The display apparatus of claim 1 , further comprising:
a data line located on the first insulating layer; and a shielding portion located on a same layer as the additional semiconductor layer and overlapping the data line, wherein the shielding portion is integrally formed with the additional semiconductor layer.

3 . The display apparatus of claim 1 , further comprising an operation control transistor comprising an operation control semiconductor layer and an operation control gate electrode,
wherein the second wiring is a driving voltage line for applying a driving voltage to a source region of the operation control semiconductor layer.

4 . The display apparatus of claim 3 , further comprising:
a driving transistor comprising a driving semiconductor layer and a driving gate electrode; and a capacitor overlapping the driving transistor and comprising a first electrode and a second electrode, wherein the driving gate electrode is integrally formed with the second electrode, and a source region of the driving semiconductor layer is connected to a drain region of the operation control semiconductor layer.

5 . The display apparatus of claim 4 , further comprising an emission control transistor comprising an emission control semiconductor layer and an emission control gate electrode,
wherein a source region of the emission control semiconductor layer is connected to a drain region of the driving semiconductor layer, and the first wiring is connected to the emission control gate electrode.

6 . The display apparatus of claim 1 , further comprising a first initialization transistor comprising a first initialization semiconductor layer and a first initialization gate electrode,
wherein the second wiring is an initialization voltage line for applying an initialization voltage to the first initialization transistor.

7 . The display apparatus of claim 6 , further comprising:
a driving transistor comprising a driving semiconductor layer and a driving gate electrode; and a capacitor overlapping the driving transistor and comprising a first electrode and a second electrode, wherein the driving gate electrode is integrally formed with the second electrode, and a source region of the first initialization semiconductor layer is connected to the driving gate electrode.

8 . The display apparatus of claim 1 , further comprising:
a second insulating layer located on the second wiring; a pixel electrode located on the second insulating layer and comprising an opening through which at least a part of the pixel electrode is exposed; an organic emission layer located on the pixel electrode in the opening; and a counter electrode located on the organic emission layer and extending to a top surface of a pixel-defining film, wherein the second wiring is electrically connected to the counter electrode.

9 . The display apparatus of claim 8 , further comprising:
an operation control transistor comprising an operation control gate electrode and an operation control semiconductor layer; a driving transistor comprising a driving semiconductor layer and a driving gate electrode; and a capacitor overlapping the driving transistor and comprising a first electrode and a second electrode, wherein the driving gate electrode is integrally formed with the second electrode, and a source region of the driving semiconductor layer is connected to a drain region of the operation control semiconductor layer.

10 . The display apparatus of claim 9 , further comprising an emission control transistor comprising an emission control semiconductor layer and an emission control gate electrode,
wherein a source region of the emission control semiconductor layer is connected to a drain region of the driving semiconductor layer, and the first wiring is connected to the emission control gate electrode.

11 . A display apparatus comprising:
a scan line configured to transmit a scan signal; an emission control line configured to transmit an emission control signal; a data line intersecting the scan line and configured to transmit a data signal; a driving voltage line intersecting the scan line and configured to transmit a driving voltage; and an additional transistor comprising an additional semiconductor layer and an additional gate electrode, wherein the additional gate electrode is provided as a part of the emission control line, and when the additional transistor is driven, a same constant voltage is applied to a source region and a drain region of the additional semiconductor layer.

12 . The display apparatus of claim 11 , further comprising a shielding portion located on a same layer as the additional semiconductor layer and overlapping the data line,
wherein the shielding portion is integrally formed with the additional semiconductor layer.

13 . The display apparatus of claim 11 , wherein the driving voltage line is connected to the source region and the drain region of the additional semiconductor layer.

14 . The display apparatus of claim 11 , further comprising an operation control transistor comprising an operation control semiconductor layer and an operation control gate electrode,
wherein a source region of the operation control semiconductor layer is connected to the driving voltage line, and the operation control gate electrode is connected to the additional gate electrode.

15 . The display apparatus of claim 14 , further comprising:
a driving transistor comprising a driving semiconductor layer and a driving gate electrode; and a capacitor overlapping the driving transistor and comprising a first electrode and a second electrode, wherein the driving gate electrode is integrally formed with the second electrode, and a source region of the driving semiconductor layer is connected to a drain region of the operation control semiconductor layer.

16 . The display apparatus of claim 15 , further comprising an emission control transistor comprising an emission control semiconductor layer and an emission control gate electrode,
wherein a source region of the emission control semiconductor layer is connected to a drain region of the driving semiconductor layer, and the emission control line is connected to the emission control gate electrode.

17 . The display apparatus of claim 11 , further comprising:
a first initialization transistor comprising a first initialization semiconductor layer and a first initialization gate electrode; and an initialization voltage line configured to apply an initialization voltage to the first initialization transistor, wherein each of the source region and the drain region of the additional semiconductor layer is connected to the initialization voltage line.

18 . The display apparatus of claim 17 , further comprising:
a driving transistor comprising a driving semiconductor layer and a driving gate electrode; and a capacitor overlapping the driving tran

Assignees

• Samsung Display Co Ltd

Inventors

• Choi Junwon
• Kim Jaewon
• Min Junyoung

Classifications

• H10K59/1216

  the pixel elements being capacitors · CPC title

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/126

  Shielding, e.g. light-blocking means over the TFTs · CPC title

• H10K59/123 Primary

  Connection of the pixel electrodes to the thin film transistors [TFT] · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title