Semiconductor device

Patent metadata

Field	Value
Publication number	US-12495590-B2
Application number	US-202318313630-A
Country	US
Kind code	B2
Filing date	May 8, 2023
Priority date	Oct 27, 2022
Publication date	Dec 9, 2025
Grant date	Dec 9, 2025

Abstract

A semiconductor device includes an active pattern including a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction. The sheet patterns include an uppermost sheet pattern and a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction. Each of the plurality of gate structures includes a gate electrode and a gate insulating film and a source/drain pattern between adjacent ones of the plurality of gate structures. Each of inner gate structures includes a gate electrode and a gate insulating film. A semiconductor liner film includes silicon-germanium, and contacts the gate insulating film of each of the inner gate structures. A portion of the semiconductor liner film protrudes upwardly in the first direction beyond an upper surface of the uppermost sheet pattern.

First claim

What is claimed is:

1 . A semiconductor device comprising:
an active pattern including a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction, wherein the plurality of sheet patterns include an uppermost sheet pattern; a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction, wherein each of the plurality of gate structures includes a gate electrode and a gate insulating film; and a source/drain pattern between adjacent ones of the plurality of gate structures, wherein the source/drain pattern includes a semiconductor liner film and a semiconductor filling film on the semiconductor liner film, wherein at least one of the plurality gate structures includes an inner gate structure between the lower pattern and a lowermost sheet pattern among the plurality of sheet patterns, and an inner gate structure between adjacent ones of the plurality of sheet patterns, each of the inner gate structures including the gate electrode and the gate insulating film, the semiconductor liner film includes silicon-germanium, and is in contact with the gate insulating film of each of the inner gate structures, and a portion of the semiconductor liner film protrudes upwardly in the second direction beyond an upper surface of the uppermost sheet pattern.

2 . The semiconductor device of claim 1 , wherein
the semiconductor liner film includes an outer surface contacting the plurality of sheet patterns and an inner surface facing the semiconductor filling film, a liner recess defined by the inner surface of the semiconductor liner film includes a plurality of width extension areas, and a width in the first direction of each of the width extension areas increases and then decreases as each of the width extension areas moves away from an upper surface of the lower pattern.

3 . The semiconductor device of claim 2 , wherein a point in the width extension area among the plurality of width extension areas at which the width in the first direction of the width extension area is the largest is positioned between the lower pattern and the lowermost sheet pattern, and between the plurality of sheet patterns adjacent to each other in the second direction.

4 . The semiconductor device of claim 2 , wherein the inner surface of the semiconductor liner film includes a plurality of convexly-curved face areas and a plurality of concavely-curved face areas.

5 . The semiconductor device of claim 1 , wherein
the semiconductor liner film includes an outer surface contacting the plurality of sheet patterns and an inner surface facing the semiconductor filling film, and a width of a liner recess defined by the inner surface of the semiconductor liner film increases and then decreases as the liner recess moves away from an upper surface of the lower pattern.

6 . The semiconductor device of claim 1 , wherein
the at least one of the plurality of gate structures includes a gate spacer on a sidewall of the gate electrode, the gate spacer includes an inner sidewall facing the gate electrode, an outer sidewall opposite to the inner sidewall of the gate spacer, and a connection sidewall connecting the inner sidewall of the gate spacer and the outer sidewall of the gate spacer to each other, and the semiconductor liner film extends along a portion of the outer sidewall of the gate spacer.

7 . The semiconductor device of claim 6 , wherein, in a plan view of the semiconductor device, the semiconductor liner film covers a portion of the outer sidewall of the gate spacer and is in contact with the outer sidewall of the gate spacer.

8 . The semiconductor device of claim 1 , wherein an inner surface of the semiconductor liner film is in contact with the semiconductor filling film.

9 . The semiconductor device of claim 8 , wherein
the source/drain pattern further includes a plurality of semiconductor inserted films spaced apart from each other in the second direction, each of the semiconductor inserted films is arranged between the semiconductor liner film and the semiconductor filling film, each of the semiconductor inserted films includes silicon-germanium, and a fraction of germanium in each of the semiconductor inserted films is greater than a fraction of germanium in the semiconductor liner film and is less than a fraction of germanium in the semiconductor filling film.

10 . The semiconductor device of claim 1 , wherein
the source/drain pattern further includes a semiconductor inserted film continuously along an inner surface of the semiconductor liner film, the semiconductor inserted film includes silicon-germanium, and a fraction of germanium in the semiconductor inserted film is greater than a fraction of germanium in the semiconductor liner film and is less than a fraction of germanium in the semiconductor filling film.

11 . The semiconductor device of claim 10 , wherein
the semiconductor inserted film includes an outer surface facing the inner surface of the semiconductor liner film, and an inner surface facing the semiconductor filling film, and the inner surface of the semiconductor inserted film includes a plurality of convexly-curved face areas and a plurality of concavely-curved face areas.

12 . A semiconductor device comprising:
an active pattern including a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction, wherein the plurality of sheet patterns include an uppermost sheet pattern; a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction, wherein each of the plurality of gate structures includes a gate spacer, a gate electrode, and a gate insulating film; and a source/drain pattern between adjacent ones of the plurality of gate structures, wherein the source/drain pattern includes a semiconductor liner film and a semiconductor filling film on the semiconductor liner film, wherein the gate spacer includes an inner sidewall facing a sidewall of the gate electrode, an outer sidewall opposite to the inner sidewall of the gate spacer, and a connection sidewall connecting the inner sidewall of the gate spacer and the outer sidewall of the gate spacer to each other, each of the semiconductor liner film and the semiconductor filling film includes silicon-germanium, a fraction of germanium in the semiconductor liner film is less than a fraction of germanium in the semiconductor filling film, a height from an upper surface of the lower pattern to an upper surface of the uppermost sheet pattern is less than a height from the upper surface of the lower pattern to an uppermost level of the semiconductor liner film, and in a plan view of the semiconductor device, the semiconductor liner film covers at least a portion of the outer sidewall of the gate spacer.

13 . The semiconductor device of claim 12 , wherein
the semiconductor liner film includes an outer surface contacting the plurality of sheet patterns and an inner surface facing the semiconductor filling film, and the inner surface of the semiconductor liner film includes a plurality of convexly-curved face areas and a plurality of concavely-curved face areas.

14 . The semiconductor device of claim 12 , wherein an inner surface of the semiconductor liner film is in contact with the semiconductor filling film.

15 . The semiconductor device of claim 12 , wherein
the source/drain pattern further includes a semiconductor inserted film between the semiconductor liner film and the semicon

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Da Hye
• Kim Jin Bum
• Kim Gyeom
• Kim Young Kwang
• Chun Kyung Bin

Classifications

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/6735

  having gates fully surrounding the channels, e.g. gate-all-around · CPC title

• H10D30/43

  having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels · CPC title

• H10D30/6713

  characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes · CPC title

• H10D62/151 Primary

  of IGFETs  (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713) · CPC title