Adaptive pulse control for high-voltage level shifters

US12494787B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12494787-B2
Application numberUS-202318462240-A
CountryUS
Kind codeB2
Filing dateSep 6, 2023
Priority dateSep 6, 2023
Publication dateDec 9, 2025
Grant dateDec 9, 2025

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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Signal converters, systems for power conversion, and methods for adaptive pulse control. The signal converter includes a pulse generator, a level shifter, and a controller. The pulse generator is configured to receive an input control signal for a switch driver. The pulse generator is also configured to generate a set control signal based on the input control signal. The level shifter is configured to generate, based on the set control signal, an output control signal having a first amplitude greater than a second amplitude of the input control signal. The level shifter is also configured to send the output control signal to the switch driver. The controller is configured to detect a common mode transient at a node coupled to the switch driver. The pulse generator is further configured to increase a pulse width of the set control signal when the controller detects the common mode transient.

First claim

Opening claim text (preview).

What is claimed is: 1 . A signal converter, comprising: a pulse generator configured to: receive an input control signal for a switch driver, and generate a set control signal based on the input control signal; a level shifter configured to: generate, based on the set control signal, an output control signal having a first amplitude greater than a second amplitude of the input control signal, and send the output control signal to the switch driver; and a controller configured to detect a common mode transient at a node coupled to the switch driver, wherein the pulse generator is further configured to increase a pulse width of the set control signal when the controller detects the common mode transient. 2 . The signal converter of claim 1 , wherein the pulse generator is further configured to generate a reset control signal based on the input control signal, and wherein the level shifter is further configured to generate the output control signal based on the set control signal and the reset control signal. 3 . The signal converter of claim 2 , wherein the pulse width is a first pulse width, and wherein the pulse generator is further configured to increase a second pulse width of the reset control signal when the controller detects the common mode transient. 4 . The signal converter of claim 1 , wherein, to increase the pulse width of the set control signal when the controller detects the common mode transient, the pulse generator is further configured to stop generating a set pulse in the set control signal after a predetermined period of time following an end of the common mode transient. 5 . The signal converter of claim 4 , wherein, to generate the set control signal based on the input control signal, the pulse generator is further configured to: start generating the set pulse in the set control signal responsive to detecting a start of an input pulse in the input control signal, and stop generating the set pulse in the set control signal responsive to detecting an end of the input pulse in the input control signal before the end of the common mode transient. 6 . The signal converter of claim 1 , wherein the switch driver is a high-side driver of a half-bridge driver. 7 . The signal converter of claim 1 , wherein the switch driver is a floating driver. 8 . A system for power conversion, comprising: a power converter including a transistor; a driver configured to control the transistor; and a signal converter configured to: receive an input control signal for the driver, generate a set control signal based on the input control signal, generate, based on the set control signal, an output control signal having a first voltage level greater than a second voltage level of the input control signal, send the output control signal to the driver, detect a common mode transient at a node coupled to the driver, and increase a pulse width of the set control signal responsive to detecting the common mode transient. 9 . The system of claim 8 , wherein the transistor is a high-side transistor, wherein the power converter further includes a low-side transistor, wherein the driver is a high-side driver, and wherein the system further includes a low-side driver configured to control the low-side transistor. 10 . The system of claim 9 , wherein the node coupled to the high-side driver is a bridge node coupled between the high-side transistor and the low-side transistor. 11 . The system of claim 8 , wherein the driver is a floating driver, and wherein the power converter further includes a diode having: a cathode coupled to the transistor, and an anode coupled to a reference terminal. 12 . The system of claim 8 , wherein the signal converter is further configured to: generate a reset control signal based on the input control signal, and generate the output control signal based on the set control signal and the reset control signal. 13 . The system of claim 12 , wherein the pulse width is a first pulse width, and wherein the signal converter is further configured to increase a second pulse width of the reset control signal responsive to detecting the common mode transient. 14 . The system of claim 8 , wherein, to increase the pulse width of the set control signal responsive to detecting the common mode transient, the signal converter is further configured to stop generating a set pulse in the set control signal after a predetermined period of time following an end of the common mode transient. 15 . The system of claim 14 , wherein, to generate the set control signal based on the input control signal, the signal converter is further configured to: start generating the set pulse in the set control signal responsive to detecting a start of an input pulse in the input control signal, and stop generating the set pulse in the set control signal responsive to detecting an end of the input pulse in the input control signal before the end of the common mode transient. 16 . A method for adaptive pulse control, the method comprising: receiving an input control signal for a transistor driver; generating a set control signal based on the input control signal; generating, based on the set control signal, an output control signal having a first amplitude greater than a second amplitude of the input control signal; sending the output control signal to the transistor driver; detecting a common mode transient at a node coupled to the transistor driver; and increasing a pulse width of the set control signal responsive to detecting the common mode transient. 17 . The method of claim 16 , further comprising: generating a reset control signal based on the input control signal; and generating the output control signal based on the set control signal and the reset control signal. 18 . The method of claim 17 , wherein the pulse width is a first pulse width, and wherein the method further comprises increasing a second pulse width of the reset control signal responsive to detecting the common mode transient. 19 . The method of claim 16 , wherein increasing the pulse width of the set control signal responsive to detecting the common mode transient further includes stopping generating a set pulse in the set control signal after a predetermined period of time following an end of the common mode transient. 20 . The method of claim 19 , wherein generating the set control signal based on the input control signal further includes: detecting a start of an input pulse in the input control signal, starting to generate the set pulse in the set control signal responsive to detecting the start of the input pulse in the input control signal, detecting an end of the input pulse in the input control signal, and stopping generating the set pulse in the set control signal responsive to detecting the end of the input pulse in the input control signal before the end of the common mode transient.

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Classifications

  • including plural semiconductor devices as final control devices for a single load · CPC title

  • Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

  • in field-effect transistor switches (H03K17/0812, H03K17/0814 take precedence) · CPC title

  • Suppression of common mode voltage or current · CPC title

  • with automatic control of output voltage or current, e.g. switching regulators · CPC title

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What does patent US12494787B2 cover?
Signal converters, systems for power conversion, and methods for adaptive pulse control. The signal converter includes a pulse generator, a level shifter, and a controller. The pulse generator is configured to receive an input control signal for a switch driver. The pulse generator is also configured to generate a set control signal based on the input control signal. The level shifter is config…
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification H03K17/08104. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 09 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).